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<!DOCTYPE html>
<html xmlns="http://www.w3.org/1999/xhtml" xmlns:svg="http://www.w3.org/2000/svg" xmlns:x86="http://www.felixcloutier.com/x86"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8"><link rel="stylesheet" type="text/css" href="style.css"></link><title>FISTTP
— Store Integer With Truncation</title></head><body><header><nav><ul><li><a href='index.html'>Index</a></li><li>December 2023</li></ul></nav></header><h1>FISTTP
— Store Integer With Truncation</h1>
<table>
<tr>
<th>Opcode</th>
<th>Instruction</th>
<th>64-Bit Mode</th>
<th>Compat/Leg Mode</th>
<th>Description</th></tr>
<tr>
<td>DF /1</td>
<td>FISTTP m16int</td>
<td>Valid</td>
<td>Valid</td>
<td>Store ST(0) in m16int with truncation.</td></tr>
<tr>
<td>DB /1</td>
<td>FISTTP m32int</td>
<td>Valid</td>
<td>Valid</td>
<td>Store ST(0) in m32int with truncation.</td></tr>
<tr>
<td>DD /1</td>
<td>FISTTP m64int</td>
<td>Valid</td>
<td>Valid</td>
<td>Store ST(0) in m64int with truncation.</td></tr></table>
<h2 id="description">Description<a class="anchor" href="#description">
</a></h2>
<p>FISTTP converts the value in ST into a signed integer using truncation (chop) as rounding mode, transfers the result to the destination, and pop ST. FISTTP accepts word, short integer, and long integer destinations.</p>
<p>The following table shows the results obtained when storing various classes of numbers in integer format.</p>
<figure id="tbl-3-28">
<table>
<tr>
<th>ST(0)</th>
<th>DEST</th></tr>
<tr>
<td>− ∞ or Value Too Large for DEST Format</td>
<td>*</td></tr>
<tr>
<td>F≤ −1</td>
<td>−I</td></tr>
<tr>
<td>−1&lt;F&lt;+1</td>
<td>0</td></tr>
<tr>
<td>FŠ+1</td>
<td>+I</td></tr>
<tr>
<td>+ ∞ or Value Too Large for DEST Format</td>
<td>*</td></tr>
<tr>
<td>NaN</td>
<td>*</td></tr></table>
<figcaption><a href='fisttp.html#tbl-3-28'>Table 3-28</a>. FISTTP Results</figcaption></figure>
<blockquote>
<p>F Meansfinitefloating-pointvalue.</p>
<p>Ι Means integer.</p>
<p>∗ Indicates floating-point invalid-operation (#IA) exception.</p></blockquote>
<p>This instruction’s operation is the same in non-64-bit modes and 64-bit mode.</p>
<h2 id="operation">Operation<a class="anchor" href="#operation">
</a></h2>
<pre>DEST := ST;
pop ST;
</pre>
<h2 id="flags-affected">Flags Affected<a class="anchor" href="#flags-affected">
</a></h2>
<p>C1 is cleared; C0, C2, C3 undefined.</p>
<h2 class="exceptions" id="numeric-exceptions">Numeric Exceptions<a class="anchor" href="#numeric-exceptions">
</a></h2>
<p>Invalid, Stack Invalid (stack underflow), Precision.</p>
<h2 class="exceptions" id="protected-mode-exceptions">Protected Mode Exceptions<a class="anchor" href="#protected-mode-exceptions">
</a></h2>
<table>
<tr>
<td rowspan="2">#GP(0)</td>
<td>If the destination is in a nonwritable segment.</td></tr>
<tr>
<td>For an illegal memory operand effective address in the CS, DS, ES, FS or GS segments.</td></tr>
<tr>
<td>#SS(0)</td>
<td>For an illegal address in the SS segment.</td></tr>
<tr>
<td>#PF(fault-code)</td>
<td>For a page fault.</td></tr>
<tr>
<td>#AC(0)</td>
<td>If alignment checking is enabled and an unaligned memory reference is made while the current privilege level is 3.</td></tr>
<tr>
<td rowspan="2">#NM</td>
<td>If CR0.EM[bit 2] = 1.</td></tr>
<tr>
<td>If CR0.TS[bit 3] = 1.</td></tr>
<tr>
<td rowspan="2">#UD</td>
<td>If CPUID.01H:ECX.SSE3[bit 0] = 0.</td></tr>
<tr>
<td>If the LOCK prefix is used.</td></tr></table>
<h2 class="exceptions" id="real-address-mode-exceptions">Real Address Mode Exceptions<a class="anchor" href="#real-address-mode-exceptions">
</a></h2>
<p>GP(0) If any part of the operand would lie outside of the effective address space from 0 to 0FFFFH.</p>
<table>
<tr>
<td rowspan="2">#NM</td>
<td>If CR0.EM[bit 2] = 1.</td></tr>
<tr>
<td>If CR0.TS[bit 3] = 1.</td></tr>
<tr>
<td rowspan="2">#UD</td>
<td>If CPUID.01H:ECX.SSE3[bit 0] = 0.</td></tr>
<tr>
<td>If the LOCK prefix is used.</td></tr></table>
<h2 class="exceptions" id="virtual-8086-mode-exceptions">Virtual 8086 Mode Exceptions<a class="anchor" href="#virtual-8086-mode-exceptions">
</a></h2>
<p>GP(0) If any part of the operand would lie outside of the effective address space from 0 to 0FFFFH.</p>
<table>
<tr>
<td rowspan="2">#NM</td>
<td>If CR0.EM[bit 2] = 1.</td></tr>
<tr>
<td>If CR0.TS[bit 3] = 1.</td></tr>
<tr>
<td rowspan="2">#UD</td>
<td>If CPUID.01H:ECX.SSE3[bit 0] = 0.</td></tr>
<tr>
<td>If the LOCK prefix is used.</td></tr>
<tr>
<td>#PF(fault-code)</td>
<td>For a page fault.</td></tr>
<tr>
<td>#AC(0)</td>
<td>For unaligned memory reference if the current privilege is 3.</td></tr></table>
<h2 class="exceptions" id="compatibility-mode-exceptions">Compatibility Mode Exceptions<a class="anchor" href="#compatibility-mode-exceptions">
</a></h2>
<p>Same exceptions as in protected mode.</p>
<h2 class="exceptions" id="64-bit-mode-exceptions">64-Bit Mode Exceptions<a class="anchor" href="#64-bit-mode-exceptions">
</a></h2>
<table>
<tr>
<td>#SS(0)</td>
<td>If a memory address referencing the SS segment is in a non-canonical form.</td></tr>
<tr>
<td>#GP(0)</td>
<td>If the memory address is in a non-canonical form.</td></tr>
<tr>
<td>#NM</td>
<td>CR0.EM[bit 2] or CR0.TS[bit 3] = 1.</td></tr>
<tr>
<td>#MF</td>
<td>If there is a pending x87 FPU exception.</td></tr>
<tr>
<td>#PF(fault-code)</td>
<td>If a page fault occurs.</td></tr>
<tr>
<td rowspan="2">#AC(0)</td>
<td>If alignment checking is enabled and an unaligned memory reference is made while the current privilege level is 3.</td></tr>
<tr>
<td>If the LOCK prefix is used.</td></tr></table><footer><p>
This UNOFFICIAL, mechanically-separated, non-verified reference is provided for convenience, but it may be
inc<span style="opacity: 0.2">omp</span>lete or b<sub>r</sub>oke<sub>n</sub> in various obvious or non-obvious
ways. Refer to <a href="https://software.intel.com/en-us/download/intel-64-and-ia-32-architectures-sdm-combined-volumes-1-2a-2b-2c-2d-3a-3b-3c-3d-and-4">Intel® 64 and IA-32 Architectures Software Developer’s Manual</a> for anything serious.
</p></footer></body></html>
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