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106 lines
4.2 KiB
HTML
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<html xmlns="http://www.w3.org/1999/xhtml" xmlns:svg="http://www.w3.org/2000/svg" xmlns:x86="http://www.felixcloutier.com/x86"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8"><link rel="stylesheet" type="text/css" href="style.css"></link><title>SHA1RNDS4
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— Perform Four Rounds of SHA1 Operation</title></head><body><header><nav><ul><li><a href='index.html'>Index</a></li><li>December 2023</li></ul></nav></header><h1>SHA1RNDS4
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— Perform Four Rounds of SHA1 Operation</h1>
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<table>
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<tr>
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<th>Opcode/Instruction</th>
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<th>Op/En</th>
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<th>64/32 bit Mode Support</th>
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<th>CPUID Feature Flag</th>
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<th>Description</th></tr>
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<tr>
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<td>NP 0F 3A CC /r ib SHA1RNDS4 xmm1, xmm2/m128, imm8</td>
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<td>RMI</td>
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<td>V/V</td>
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<td>SHA</td>
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<td>Performs four rounds of SHA1 operation operating on SHA1 state (A,B,C,D) from xmm1, with a pre-computed sum of the next 4 round message dwords and state variable E from xmm2/m128. The immediate byte controls logic functions and round constants.</td></tr></table>
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<h2 id="instruction-operand-encoding">Instruction Operand Encoding<a class="anchor" href="#instruction-operand-encoding">
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¶
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</a></h2>
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<table>
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<tr>
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<th>Op/En</th>
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<th>Operand 1</th>
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<th>Operand 2</th>
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<th>Operand 3</th></tr>
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<tr>
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<td>RMI</td>
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<td>ModRM:reg (r, w)</td>
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<td>ModRM:r/m (r)</td>
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<td>imm8</td></tr></table>
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<h2 id="description">Description<a class="anchor" href="#description">
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¶
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</a></h2>
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<p>The SHA1RNDS4 instruction performs four rounds of SHA1 operation using an initial SHA1 state (A,B,C,D) from the first operand (which is a source operand and the destination operand) and some pre-computed sum of the next 4 round message dwords, and state variable E from the second operand (a source operand). The updated SHA1 state (A,B,C,D) after four rounds of processing is stored in the destination operand.</p>
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<h2 id="operation">Operation<a class="anchor" href="#operation">
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¶
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</a></h2>
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<h3 id="sha1rnds4">SHA1RNDS4<a class="anchor" href="#sha1rnds4">
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¶
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</a></h3>
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<pre>The function f() and Constant K are dependent on the value of the immediate.
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IF ( imm8[1:0] = 0 )
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THEN f() := f0(),
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K := K<sub>0</sub>;
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ELSE IF ( imm8[1:0]
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= 1 )
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THEN f() := f1(),
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K := K<sub>1</sub>;
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ELSE IF ( imm8[1:0]
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= 2 )
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THEN f() := f2(),
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K := K<sub>2</sub>;
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ELSE IF ( imm8[1:0]
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= 3 )
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THEN f() := f3(),
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K := K3;
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FI;
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A := SRC1[127:96];
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B := SRC1[95:64];
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C := SRC1[63:32];
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D := SRC1[31:0];
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W<sub>0</sub>E := SRC2[127:96];
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W<sub>1</sub> := SRC2[95:64];
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W<sub>2</sub> := SRC2[63:32];
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W<sub>3</sub> := SRC2[31:0];
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Round i = 0 operation:
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A_1 := f (B, C, D) + (A ROL 5) +W<sub>0</sub>E +K;
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B_1 := A;
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C_1 := B ROL 30;
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D_1 := C;
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E_1 := D;
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FOR i = 1 to 3
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A_(i +1) := f (B_i, C_i, D_i) + (A_i ROL 5) +W<sub>i</sub>+ E_i +K;
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B_(i +1) := A_i;
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C_(i +1) := B_i ROL 30;
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D_(i +1) := C_i;
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E_(i +1) := D_i;
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ENDFOR
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DEST[127:96] := A_4;
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DEST[95:64] := B_4;
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DEST[63:32] := C_4;
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DEST[31:0] := D_4;
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</pre>
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<h2 id="intel-c-c++-compiler-intrinsic-equivalent">Intel C/C++ Compiler Intrinsic Equivalent<a class="anchor" href="#intel-c-c++-compiler-intrinsic-equivalent">
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¶
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</a></h2>
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<pre>SHA1RNDS4 __m128i _mm_sha1rnds4_epu32(__m128i, __m128i, const int);
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</pre>
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<h2 id="flags-affected">Flags Affected<a class="anchor" href="#flags-affected">
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¶
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</a></h2>
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<p>None.</p>
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<h2 class="exceptions" id="simd-floating-point-exceptions">SIMD Floating-Point Exceptions<a class="anchor" href="#simd-floating-point-exceptions">
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¶
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</a></h2>
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<p>None.</p>
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<h2 class="exceptions" id="other-exceptions">Other Exceptions<a class="anchor" href="#other-exceptions">
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¶
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</a></h2>
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<p>See <span class="not-imported">Table 2-21</span>, “Type 4 Class Exception Conditions.”</p><footer><p>
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This UNOFFICIAL, mechanically-separated, non-verified reference is provided for convenience, but it may be
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inc<span style="opacity: 0.2">omp</span>lete or b<sub>r</sub>oke<sub>n</sub> in various obvious or non-obvious
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ways. Refer to <a href="https://software.intel.com/en-us/download/intel-64-and-ia-32-architectures-sdm-combined-volumes-1-2a-2b-2c-2d-3a-3b-3c-3d-and-4">Intel® 64 and IA-32 Architectures Software Developer’s Manual</a> for anything serious.
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</p></footer></body></html>
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