forked from NRZCode/ia32-64
155 lines
6.6 KiB
HTML
155 lines
6.6 KiB
HTML
<!DOCTYPE html>
|
||
<html xmlns="http://www.w3.org/1999/xhtml" xmlns:svg="http://www.w3.org/2000/svg" xmlns:x86="http://www.felixcloutier.com/x86"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8"><link rel="stylesheet" type="text/css" href="style.css"></link><title>LOOP/LOOPcc
|
||
— Loop According to ECX Counter</title></head><body><header><nav><ul><li><a href='index.html'>Index</a></li><li>December 2023</li></ul></nav></header><h1>LOOP/LOOPcc
|
||
— Loop According to ECX Counter</h1>
|
||
|
||
|
||
<table>
|
||
<tr>
|
||
<th>Opcode</th>
|
||
<th>Instruction</th>
|
||
<th>Op/En</th>
|
||
<th>64-Bit Mode</th>
|
||
<th>Compat/Leg Mode</th>
|
||
<th>Description</th></tr>
|
||
<tr>
|
||
<td>E2 cb</td>
|
||
<td>LOOP rel8</td>
|
||
<td>D</td>
|
||
<td>Valid</td>
|
||
<td>Valid</td>
|
||
<td>Decrement count; jump short if count ≠ 0.</td></tr>
|
||
<tr>
|
||
<td>E1 cb</td>
|
||
<td>LOOPE rel8</td>
|
||
<td>D</td>
|
||
<td>Valid</td>
|
||
<td>Valid</td>
|
||
<td>Decrement count; jump short if count ≠ 0 and ZF = 1.</td></tr>
|
||
<tr>
|
||
<td>E0 cb</td>
|
||
<td>LOOPNE rel8</td>
|
||
<td>D</td>
|
||
<td>Valid</td>
|
||
<td>Valid</td>
|
||
<td>Decrement count; jump short if count ≠ 0 and ZF = 0.</td></tr></table>
|
||
<h2 id="instruction-operand-encoding">Instruction Operand Encoding<a class="anchor" href="#instruction-operand-encoding">
|
||
¶
|
||
</a></h2>
|
||
<table>
|
||
<tr>
|
||
<th>Op/En Operand 1 Operand 2 Operand 3</th>
|
||
<th></th>
|
||
<th></th>
|
||
<th></th>
|
||
<th>Operand 4</th></tr>
|
||
<tr>
|
||
<td>D Offset N/A N/A</td>
|
||
<td></td>
|
||
<td></td>
|
||
<td></td>
|
||
<td>N/A</td></tr></table>
|
||
<h2 id="description">Description<a class="anchor" href="#description">
|
||
¶
|
||
</a></h2>
|
||
<p>Performs a loop operation using the RCX, ECX or CX register as a counter (depending on whether address size is 64 bits, 32 bits, or 16 bits). Note that the LOOP instruction ignores REX.W; but 64-bit address size can be over-ridden using a 67H prefix.</p>
|
||
<p>Each time the LOOP instruction is executed, the count register is decremented, then checked for 0. If the count is 0, the loop is terminated and program execution continues with the instruction following the LOOP instruction. If the count is not zero, a near jump is performed to the destination (target) operand, which is presumably the instruction at the beginning of the loop.</p>
|
||
<p>The target instruction is specified with a relative offset (a signed offset relative to the current value of the instruction pointer in the IP/EIP/RIP register). This offset is generally specified as a label in assembly code, but at the machine code level, it is encoded as a signed, 8-bit immediate value, which is added to the instruction pointer. Offsets of –128 to +127 are allowed with this instruction.</p>
|
||
<p>Some forms of the loop instruction (LOOP<em>cc</em>) also accept the ZF flag as a condition for terminating the loop before the count reaches zero. With these forms of the instruction, a condition code (<em>cc</em>) is associated with each instruction to indicate the condition being tested for. Here, the LOOP<em>cc</em> instruction itself does not affect the state of the ZF flag; the ZF flag is changed by other instructions in the loop.</p>
|
||
<h2 id="operation">Operation<a class="anchor" href="#operation">
|
||
¶
|
||
</a></h2>
|
||
<pre>IF (AddressSize = 32)
|
||
THEN Count is ECX;
|
||
ELSE IF (AddressSize = 64)
|
||
Count is RCX;
|
||
ELSE Count is CX;
|
||
FI;
|
||
Count := Count – 1;
|
||
IF Instruction is not LOOP
|
||
THEN
|
||
IF (Instruction := LOOPE) or (Instruction := LOOPZ)
|
||
THEN IF (ZF = 1) and (Count ≠ 0)
|
||
THEN BranchCond := 1;
|
||
ELSE BranchCond := 0;
|
||
FI;
|
||
ELSE (Instruction = LOOPNE) or (Instruction = LOOPNZ)
|
||
IF (ZF = 0 ) and (Count ≠ 0)
|
||
THEN BranchCond := 1;
|
||
ELSE BranchCond := 0;
|
||
FI;
|
||
ELSE (* Instruction = LOOP *)
|
||
IF (Count ≠ 0)
|
||
THEN BranchCond := 1;
|
||
ELSE BranchCond := 0;
|
||
FI;
|
||
FI;
|
||
IF BranchCond = 1
|
||
THEN
|
||
IF in 64-bit mode (* OperandSize = 64 *)
|
||
THEN
|
||
tempRIP := RIP + SignExtend(DEST);
|
||
IF tempRIP is not canonical
|
||
THEN #GP(0);
|
||
ELSE RIP := tempRIP;
|
||
FI;
|
||
ELSE
|
||
tempEIP := EIP SignExtend(DEST);
|
||
IF OperandSize 16
|
||
THEN tempEIP := tempEIP AND 0000FFFFH;
|
||
FI;
|
||
IF tempEIP is not within code segment limit
|
||
THEN #GP(0);
|
||
ELSE EIP := tempEIP;
|
||
FI;
|
||
FI;
|
||
ELSE
|
||
Terminate loop and continue program execution at (R/E)IP;
|
||
FI;
|
||
</pre>
|
||
<h2 id="flags-affected">Flags Affected<a class="anchor" href="#flags-affected">
|
||
¶
|
||
</a></h2>
|
||
<p>None.</p>
|
||
<h2 class="exceptions" id="protected-mode-exceptions">Protected Mode Exceptions<a class="anchor" href="#protected-mode-exceptions">
|
||
¶
|
||
</a></h2>
|
||
<table>
|
||
<tr>
|
||
<td>#GP(0)</td>
|
||
<td>If the offset being jumped to is beyond the limits of the CS segment.</td></tr>
|
||
<tr>
|
||
<td>#UD</td>
|
||
<td>If the LOCK prefix is used.</td></tr></table>
|
||
<h2 class="exceptions" id="real-address-mode-exceptions">Real-Address Mode Exceptions<a class="anchor" href="#real-address-mode-exceptions">
|
||
¶
|
||
</a></h2>
|
||
<table>
|
||
<tr>
|
||
<td>#GP</td>
|
||
<td>If the offset being jumped to is beyond the limits of the CS segment or is outside of the effective address space from 0 to FFFFH. This condition can occur if a 32-bit address size override prefix is used.</td></tr>
|
||
<tr>
|
||
<td>#UD</td>
|
||
<td>If the LOCK prefix is used.</td></tr></table>
|
||
<h2 class="exceptions" id="virtual-8086-mode-exceptions">Virtual-8086 Mode Exceptions<a class="anchor" href="#virtual-8086-mode-exceptions">
|
||
¶
|
||
</a></h2>
|
||
<p>Same exceptions as in real address mode.</p>
|
||
<h2 class="exceptions" id="compatibility-mode-exceptions">Compatibility Mode Exceptions<a class="anchor" href="#compatibility-mode-exceptions">
|
||
¶
|
||
</a></h2>
|
||
<p>Same exceptions as in protected mode.</p>
|
||
<h2 class="exceptions" id="64-bit-mode-exceptions">64-Bit Mode Exceptions<a class="anchor" href="#64-bit-mode-exceptions">
|
||
¶
|
||
</a></h2>
|
||
<table>
|
||
<tr>
|
||
<td>#GP(0)</td>
|
||
<td>If the offset being jumped to is in a non-canonical form.</td></tr>
|
||
<tr>
|
||
<td>#UD</td>
|
||
<td>If the LOCK prefix is used.</td></tr></table><footer><p>
|
||
This UNOFFICIAL, mechanically-separated, non-verified reference is provided for convenience, but it may be
|
||
inc<span style="opacity: 0.2">omp</span>lete or b<sub>r</sub>oke<sub>n</sub> in various obvious or non-obvious
|
||
ways. Refer to <a href="https://software.intel.com/en-us/download/intel-64-and-ia-32-architectures-sdm-combined-volumes-1-2a-2b-2c-2d-3a-3b-3c-3d-and-4">Intel® 64 and IA-32 Architectures Software Developer’s Manual</a> for anything serious.
|
||
</p></footer></body></html>
|