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<html xmlns="http://www.w3.org/1999/xhtml" xmlns:svg="http://www.w3.org/2000/svg" xmlns:x86="http://www.felixcloutier.com/x86"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8"><link rel="stylesheet" type="text/css" href="style.css"></link><title>KNOTW/KNOTB/KNOTQ/KNOTD
— NOT Mask Register</title></head><body><header><nav><ul><li><a href='index.html'>Index</a></li><li>December 2023</li></ul></nav></header><h1>KNOTW/KNOTB/KNOTQ/KNOTD
— NOT Mask Register</h1>
<table>
<tr>
<th>Opcode/Instruction</th>
<th>Op/En</th>
<th>64/32 bit Mode Support</th>
<th>CPUID Feature Flag</th>
<th>Description</th></tr>
<tr>
<td>VEX.L0.0F.W0 44 /r KNOTW k1, k2</td>
<td>RR</td>
<td>V/V</td>
<td>AVX512F</td>
<td>Bitwise NOT of 16 bits mask k2.</td></tr>
<tr>
<td>VEX.L0.66.0F.W0 44 /r KNOTB k1, k2</td>
<td>RR</td>
<td>V/V</td>
<td>AVX512DQ</td>
<td>Bitwise NOT of 8 bits mask k2.</td></tr>
<tr>
<td>VEX.L0.0F.W1 44 /r KNOTQ k1, k2</td>
<td>RR</td>
<td>V/V</td>
<td>AVX512BW</td>
<td>Bitwise NOT of 64 bits mask k2.</td></tr>
<tr>
<td>VEX.L0.66.0F.W1 44 /r KNOTD k1, k2</td>
<td>RR</td>
<td>V/V</td>
<td>AVX512BW</td>
<td>Bitwise NOT of 32 bits mask k2.</td></tr></table>
<h2 id="instruction-operand-encoding">Instruction Operand Encoding<a class="anchor" href="#instruction-operand-encoding">
</a></h2>
<table>
<tr>
<th>Op/En</th>
<th>Operand 1</th>
<th>Operand 2</th></tr>
<tr>
<td>RR</td>
<td>ModRM:reg (w)</td>
<td>ModRM:r/m (r, ModRM:[7:6] must be 11b)</td></tr></table>
<h2 id="description">Description<a class="anchor" href="#description">
</a></h2>
<p>Performs a bitwise NOT of vector mask k2 and writes the result into vector mask k1.</p>
<h2 id="operation">Operation<a class="anchor" href="#operation">
</a></h2>
<h3 id="knotw">KNOTW<a class="anchor" href="#knotw">
</a></h3>
<pre>DEST[15:0] := BITWISE NOT SRC[15:0]
DEST[MAX_KL-1:16] := 0
</pre>
<h3 id="knotb">KNOTB<a class="anchor" href="#knotb">
</a></h3>
<pre>DEST[7:0] := BITWISE NOT SRC[7:0]
DEST[MAX_KL-1:8] := 0
</pre>
<h3 id="knotq">KNOTQ<a class="anchor" href="#knotq">
</a></h3>
<pre>DEST[63:0] := BITWISE NOT SRC[63:0]
DEST[MAX_KL-1:64] := 0
</pre>
<h3 id="knotd">KNOTD<a class="anchor" href="#knotd">
</a></h3>
<pre>DEST[31:0] := BITWISE NOT SRC[31:0]
DEST[MAX_KL-1:32] := 0
</pre>
<h2 id="intel-c-c++-compiler-intrinsic-equivalent">Intel C/C++ Compiler Intrinsic Equivalent<a class="anchor" href="#intel-c-c++-compiler-intrinsic-equivalent">
</a></h2>
<pre>KNOTW __mmask16 _mm512_knot(__mmask16 a);
</pre>
<h2 id="flags-affected">Flags Affected<a class="anchor" href="#flags-affected">
</a></h2>
<p>None.</p>
<h2 class="exceptions" id="simd-floating-point-exceptions">SIMD Floating-Point Exceptions<a class="anchor" href="#simd-floating-point-exceptions">
</a></h2>
<p>None.</p>
<h2 class="exceptions" id="other-exceptions">Other Exceptions<a class="anchor" href="#other-exceptions">
</a></h2>
<p>See <span class="not-imported">Table 2-63</span>, “TYPE K20 Exception Definition (VEX-Encoded OpMask Instructions w/o Memory Arg).”</p><footer><p>
This UNOFFICIAL, mechanically-separated, non-verified reference is provided for convenience, but it may be
inc<span style="opacity: 0.2">omp</span>lete or b<sub>r</sub>oke<sub>n</sub> in various obvious or non-obvious
ways. Refer to <a href="https://software.intel.com/en-us/download/intel-64-and-ia-32-architectures-sdm-combined-volumes-1-2a-2b-2c-2d-3a-3b-3c-3d-and-4">Intel® 64 and IA-32 Architectures Software Developers Manual</a> for anything serious.
</p></footer></body></html>