forked from NRZCode/ia32-64
195 lines
5.9 KiB
HTML
195 lines
5.9 KiB
HTML
<!DOCTYPE html>
|
||
<html xmlns="http://www.w3.org/1999/xhtml" xmlns:svg="http://www.w3.org/2000/svg" xmlns:x86="http://www.felixcloutier.com/x86"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8"><link rel="stylesheet" type="text/css" href="style.css"></link><title>FYL2X
|
||
— Compute y ∗ log2x</title></head><body><header><nav><ul><li><a href='index.html'>Index</a></li><li>December 2023</li></ul></nav></header><h1>FYL2X
|
||
— Compute y ∗ log2x</h1>
|
||
|
||
<table>
|
||
<tr>
|
||
<th>Opcode</th>
|
||
<th>Instruction</th>
|
||
<th>64-Bit Mode</th>
|
||
<th>Compat/Leg Mode</th>
|
||
<th>Description</th></tr>
|
||
<tr>
|
||
<td>D9 F1</td>
|
||
<td>FYL2X</td>
|
||
<td>Valid</td>
|
||
<td>Valid</td>
|
||
<td>Replace ST(1) with (ST(1) ∗ log<sub>2</sub>ST(0)) and pop the register stack.</td></tr></table>
|
||
<h2 id="description">Description<a class="anchor" href="#description">
|
||
¶
|
||
</a></h2>
|
||
<p>Computes (ST(1) ∗ log<sub>2</sub> (ST(0))), stores the result in register ST(1), and pops the FPU register stack. The source operand in ST(0) must be a non-zero positive number.</p>
|
||
<p>The following table shows the results obtained when taking the log of various classes of numbers, assuming that neither overflow nor underflow occurs.</p>
|
||
<figure id="tbl-3-48">
|
||
<table>
|
||
<tr>
|
||
<th colspan="10">ST(0)</th></tr>
|
||
<tr>
|
||
<td rowspan="8"><strong>ST(1)</strong></td>
|
||
<td></td>
|
||
<td>−∞</td>
|
||
<td>−F</td>
|
||
<td>±0</td>
|
||
<td>+0<+F<+1</td>
|
||
<td>+1</td>
|
||
<td>+F>+1</td>
|
||
<td>+∞</td>
|
||
<td>NaN</td></tr>
|
||
<tr>
|
||
<td>−∞</td>
|
||
<td>*</td>
|
||
<td>*</td>
|
||
<td>+∞</td>
|
||
<td>+∞</td>
|
||
<td>*</td>
|
||
<td>−∞</td>
|
||
<td>−∞</td>
|
||
<td>NaN</td></tr>
|
||
<tr>
|
||
<td>−F</td>
|
||
<td>*</td>
|
||
<td>*</td>
|
||
<td>**</td>
|
||
<td>+F</td>
|
||
<td>−0</td>
|
||
<td>−F</td>
|
||
<td>−∞</td>
|
||
<td>NaN</td></tr>
|
||
<tr>
|
||
<td>−0</td>
|
||
<td>*</td>
|
||
<td>*</td>
|
||
<td>*</td>
|
||
<td>+0</td>
|
||
<td>−0</td>
|
||
<td>−0</td>
|
||
<td>*</td>
|
||
<td>NaN</td></tr>
|
||
<tr>
|
||
<td>+0</td>
|
||
<td>*</td>
|
||
<td>*</td>
|
||
<td>*</td>
|
||
<td>−0</td>
|
||
<td>+0</td>
|
||
<td>+0</td>
|
||
<td>*</td>
|
||
<td>NaN</td></tr>
|
||
<tr>
|
||
<td>+F</td>
|
||
<td>*</td>
|
||
<td>*</td>
|
||
<td>**</td>
|
||
<td>−F</td>
|
||
<td>+0</td>
|
||
<td>+F</td>
|
||
<td>+∞</td>
|
||
<td>NaN</td></tr>
|
||
<tr>
|
||
<td>+∞</td>
|
||
<td>*</td>
|
||
<td>*</td>
|
||
<td>−∞</td>
|
||
<td>−∞</td>
|
||
<td>*</td>
|
||
<td>+∞</td>
|
||
<td>+∞</td>
|
||
<td>NaN</td></tr>
|
||
<tr>
|
||
<td>NaN</td>
|
||
<td>NaN</td>
|
||
<td>NaN</td>
|
||
<td>NaN</td>
|
||
<td>NaN</td>
|
||
<td>NaN</td>
|
||
<td>NaN</td>
|
||
<td>NaN</td>
|
||
<td>NaN</td></tr></table>
|
||
<figcaption><a href='fyl2x.html#tbl-3-48'>Table 3-48</a>. FYL2X Results</figcaption></figure>
|
||
<blockquote>
|
||
<p>F Means finite floating-point value.</p>
|
||
<p>* Indicatesfloating-pointinvalid-operation(#IA)exception.</p>
|
||
<p>** Indicates floating-point zero-divide (#Z) exception.</p></blockquote>
|
||
<p>If the divide-by-zero exception is masked and register ST(0) contains ±0, the instruction returns ∞ with a sign that is the opposite of the sign of the source operand in register ST(1).</p>
|
||
<p>The FYL2X instruction is designed with a built-in multiplication to optimize the calculation of logarithms with an arbitrary positive base (b):</p>
|
||
<p>log<sub>b</sub>x := (log<sub>2</sub>b)<sup>–1</sup> ∗ log<sub>2</sub>x</p>
|
||
<p>This instruction’s operation is the same in non-64-bit modes and 64-bit mode.</p>
|
||
<h2 id="operation">Operation<a class="anchor" href="#operation">
|
||
¶
|
||
</a></h2>
|
||
<pre>ST(1) := ST(1) ∗ log<sub>2</sub>ST(0);
|
||
PopRegisterStack;
|
||
</pre>
|
||
<h2 id="fpu-flags-affected">FPU Flags Affected<a class="anchor" href="#fpu-flags-affected">
|
||
¶
|
||
</a></h2>
|
||
<table>
|
||
<tr>
|
||
<td rowspan="2">C1</td>
|
||
<td>Set to 0 if stack underflow occurred.</td></tr>
|
||
<tr>
|
||
<td>Set if result was rounded up; cleared otherwise.</td></tr>
|
||
<tr>
|
||
<td>C0, C2, C3</td>
|
||
<td>Undefined.</td></tr></table>
|
||
<h2 class="exceptions" id="floating-point-exceptions">Floating-Point Exceptions<a class="anchor" href="#floating-point-exceptions">
|
||
¶
|
||
</a></h2>
|
||
<table>
|
||
<tr>
|
||
<td>#IS</td>
|
||
<td>Stack underflow occurred.</td></tr>
|
||
<tr>
|
||
<td rowspan="2">#IA</td>
|
||
<td>Either operand is an SNaN or unsupported format.</td></tr>
|
||
<tr>
|
||
<td>Source operand in register ST(0) is a negative finite value (not -0).</td></tr>
|
||
<tr>
|
||
<td>#Z</td>
|
||
<td>Source operand in register ST(0) is ±0.</td></tr>
|
||
<tr>
|
||
<td>#D</td>
|
||
<td>Source operand is a denormal value.</td></tr>
|
||
<tr>
|
||
<td>#U</td>
|
||
<td>Result is too small for destination format.</td></tr>
|
||
<tr>
|
||
<td>#O</td>
|
||
<td>Result is too large for destination format.</td></tr>
|
||
<tr>
|
||
<td>#P</td>
|
||
<td>Value cannot be represented exactly in destination format.</td></tr></table>
|
||
<h2 class="exceptions" id="protected-mode-exceptions">Protected Mode Exceptions<a class="anchor" href="#protected-mode-exceptions">
|
||
¶
|
||
</a></h2>
|
||
<table>
|
||
<tr>
|
||
<td>#NM</td>
|
||
<td>CR0.EM[bit 2] or CR0.TS[bit 3] = 1.</td></tr>
|
||
<tr>
|
||
<td>#MF</td>
|
||
<td>If there is a pending x87 FPU exception.</td></tr>
|
||
<tr>
|
||
<td>#UD</td>
|
||
<td>If the LOCK prefix is used.</td></tr></table>
|
||
<h2 class="exceptions" id="real-address-mode-exceptions">Real-Address Mode Exceptions<a class="anchor" href="#real-address-mode-exceptions">
|
||
¶
|
||
</a></h2>
|
||
<p>Same exceptions as in protected mode.</p>
|
||
<h2 class="exceptions" id="virtual-8086-mode-exceptions">Virtual-8086 Mode Exceptions<a class="anchor" href="#virtual-8086-mode-exceptions">
|
||
¶
|
||
</a></h2>
|
||
<p>Same exceptions as in protected mode.</p>
|
||
<h2 class="exceptions" id="compatibility-mode-exceptions">Compatibility Mode Exceptions<a class="anchor" href="#compatibility-mode-exceptions">
|
||
¶
|
||
</a></h2>
|
||
<p>Same exceptions as in protected mode.</p>
|
||
<h2 class="exceptions" id="64-bit-mode-exceptions">64-Bit Mode Exceptions<a class="anchor" href="#64-bit-mode-exceptions">
|
||
¶
|
||
</a></h2>
|
||
<p>Same exceptions as in protected mode.</p><footer><p>
|
||
This UNOFFICIAL, mechanically-separated, non-verified reference is provided for convenience, but it may be
|
||
inc<span style="opacity: 0.2">omp</span>lete or b<sub>r</sub>oke<sub>n</sub> in various obvious or non-obvious
|
||
ways. Refer to <a href="https://software.intel.com/en-us/download/intel-64-and-ia-32-architectures-sdm-combined-volumes-1-2a-2b-2c-2d-3a-3b-3c-3d-and-4">Intel® 64 and IA-32 Architectures Software Developer’s Manual</a> for anything serious.
|
||
</p></footer></body></html>
|