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131 lines
4.4 KiB
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<html xmlns="http://www.w3.org/1999/xhtml" xmlns:svg="http://www.w3.org/2000/svg" xmlns:x86="http://www.felixcloutier.com/x86"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8"><link rel="stylesheet" type="text/css" href="style.css"></link><title>KORTESTW/KORTESTB/KORTESTQ/KORTESTD
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— OR Masks and Set Flags</title></head><body><header><nav><ul><li><a href='index.html'>Index</a></li><li>December 2023</li></ul></nav></header><h1>KORTESTW/KORTESTB/KORTESTQ/KORTESTD
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— OR Masks and Set Flags</h1>
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<table>
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<tr>
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<th>Opcode/Instruction</th>
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<th>Op/E n</th>
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<th>64/32 bit Mode Support</th>
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<th>CPUID Feature Flag</th>
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<th>Description</th></tr>
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<tr>
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<td>VEX.L0.0F.W0 98 /r KORTESTW k1, k2</td>
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<td>RR</td>
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<td>V/V</td>
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<td>AVX512F</td>
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<td>Bitwise OR 16 bits masks k1 and k2 and update ZF and CF accordingly.</td></tr>
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<tr>
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<td>VEX.L0.66.0F.W0 98 /r KORTESTB k1, k2</td>
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<td>RR</td>
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<td>V/V</td>
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<td>AVX512DQ</td>
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<td>Bitwise OR 8 bits masks k1 and k2 and update ZF and CF accordingly.</td></tr>
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<tr>
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<td>VEX.L0.0F.W1 98 /r KORTESTQ k1, k2</td>
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<td>RR</td>
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<td>V/V</td>
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<td>AVX512BW</td>
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<td>Bitwise OR 64 bits masks k1 and k2 and update ZF and CF accordingly.</td></tr>
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<tr>
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<td>VEX.L0.66.0F.W1 98 /r KORTESTD k1, k2</td>
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<td>RR</td>
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<td>V/V</td>
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<td>AVX512BW</td>
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<td>Bitwise OR 32 bits masks k1 and k2 and update ZF and CF accordingly.</td></tr></table>
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<h2 id="instruction-operand-encoding">Instruction Operand Encoding<a class="anchor" href="#instruction-operand-encoding">
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¶
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</a></h2>
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<table>
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<tr>
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<th>Op/En</th>
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<th>Operand 1</th>
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<th>Operand 2</th></tr>
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<tr>
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<td>RR</td>
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<td>ModRM:reg (w)</td>
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<td>ModRM:r/m (r, ModRM:[7:6] must be 11b)</td></tr></table>
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<h2 id="description">Description<a class="anchor" href="#description">
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¶
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</a></h2>
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<p>Performs a bitwise OR between the vector mask register k2, and the vector mask register k1, and sets CF and ZF based on the operation result.</p>
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<p>ZF flag is set if both sources are 0x0. CF is set if, after the OR operation is done, the operation result is all 1’s.</p>
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<h2 id="operation">Operation<a class="anchor" href="#operation">
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¶
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</a></h2>
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<h3 id="kortestw">KORTESTW<a class="anchor" href="#kortestw">
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¶
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</a></h3>
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<pre>TMP[15:0] := DEST[15:0] BITWISE OR SRC[15:0]
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IF(TMP[15:0]=0)
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THEN ZF := 1
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ELSE ZF := 0
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FI;
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IF(TMP[15:0]=FFFFh)
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THEN CF := 1
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ELSE CF := 0
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FI;
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</pre>
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<h3 id="kortestb">KORTESTB<a class="anchor" href="#kortestb">
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¶
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</a></h3>
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<pre>TMP[7:0] := DEST[7:0] BITWISE OR SRC[7:0]
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IF(TMP[7:0]=0)
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THEN ZF := 1
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ELSE ZF := 0
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FI;
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IF(TMP[7:0]==FFh)
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THEN CF := 1
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ELSE CF := 0
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FI;
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</pre>
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<h3 id="kortestq">KORTESTQ<a class="anchor" href="#kortestq">
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¶
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</a></h3>
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<pre>TMP[63:0] := DEST[63:0] BITWISE OR SRC[63:0]
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IF(TMP[63:0]=0)
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THEN ZF := 1
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ELSE ZF := 0
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FI;
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IF(TMP[63:0]==FFFFFFFF_FFFFFFFFh)
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THEN CF := 1
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ELSE CF := 0
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FI;
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</pre>
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<h3 id="kortestd">KORTESTD<a class="anchor" href="#kortestd">
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¶
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</a></h3>
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<pre>TMP[31:0] := DEST[31:0] BITWISE OR SRC[31:0]
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IF(TMP[31:0]=0)
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THEN ZF := 1
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ELSE ZF := 0
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FI;
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IF(TMP[31:0]=FFFFFFFFh)
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THEN CF := 1
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ELSE CF := 0
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FI;
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</pre>
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<h2 id="intel-c-c++-compiler-intrinsic-equivalent">Intel C/C++ Compiler Intrinsic Equivalent<a class="anchor" href="#intel-c-c++-compiler-intrinsic-equivalent">
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¶
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</a></h2>
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<pre>KORTESTW __mmask16 _mm512_kortest[cz](__mmask16 a, __mmask16 b);
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</pre>
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<h2 id="flags-affected">Flags Affected<a class="anchor" href="#flags-affected">
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¶
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</a></h2>
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<p>The ZF flag is set if the result of OR-ing both sources is all 0s.</p>
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<p>The CF flag is set if the result of OR-ing both sources is all 1s.</p>
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<p>The OF, SF, AF, and PF flags are set to 0.</p>
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<h2 class="exceptions" id="other-exceptions">Other Exceptions<a class="anchor" href="#other-exceptions">
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¶
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</a></h2>
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<p>See <span class="not-imported">Table 2-63</span>, “TYPE K20 Exception Definition (VEX-Encoded OpMask Instructions w/o Memory Arg).”</p><footer><p>
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This UNOFFICIAL, mechanically-separated, non-verified reference is provided for convenience, but it may be
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inc<span style="opacity: 0.2">omp</span>lete or b<sub>r</sub>oke<sub>n</sub> in various obvious or non-obvious
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ways. Refer to <a href="https://software.intel.com/en-us/download/intel-64-and-ia-32-architectures-sdm-combined-volumes-1-2a-2b-2c-2d-3a-3b-3c-3d-and-4">Intel® 64 and IA-32 Architectures Software Developer’s Manual</a> for anything serious.
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</p></footer></body></html>
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