127 lines
4.7 KiB
HTML
127 lines
4.7 KiB
HTML
<!DOCTYPE html>
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<html xmlns="http://www.w3.org/1999/xhtml" xmlns:svg="http://www.w3.org/2000/svg" xmlns:x86="http://www.felixcloutier.com/x86"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8"><link rel="stylesheet" type="text/css" href="style.css"></link><title>INCSSPD/INCSSPQ
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— Increment Shadow Stack Pointer</title></head><body><header><nav><ul><li><a href='index.html'>Index</a></li><li>December 2023</li></ul></nav></header><h1>INCSSPD/INCSSPQ
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— Increment Shadow Stack Pointer</h1>
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<table>
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<tr>
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<th>Opcode/Instruction</th>
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<th>Op / En</th>
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<th>64/32 bit Mode Support</th>
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<th>CPUID Feature Flag</th>
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<th>Description</th></tr>
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<tr>
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<td>F3 0F AE /05 INCSSPD r32</td>
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<td>R</td>
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<td>V/V</td>
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<td>CET_SS</td>
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<td>Increment SSP by 4 * r32[7:0].</td></tr>
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<tr>
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<td>F3 REX.W 0F AE /05 INCSSPQ r64</td>
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<td>R</td>
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<td>V/N.E.</td>
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<td>CET_SS</td>
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<td>Increment SSP by 8 * r64[7:0].</td></tr></table>
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<h2 id="instruction-operand-encoding">Instruction Operand Encoding<a class="anchor" href="#instruction-operand-encoding">
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¶
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</a></h2>
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<table>
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<tr>
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<th>Op/En</th>
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<th>Tuple Type</th>
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<th>Operand 1</th>
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<th>Operand 2</th>
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<th>Operand 3</th>
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<th>Operand 4</th></tr>
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<tr>
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<td>R</td>
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<td>N/A</td>
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<td>ModRM:r/m (r)</td>
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<td>N/A</td>
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<td>N/A</td>
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<td>N/A</td></tr></table>
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<h2 id="description">Description<a class="anchor" href="#description">
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¶
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</a></h2>
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<p>This instruction can be used to increment the current shadow stack pointer by the operand size of the instruction times the unsigned 8-bit value specified by bits 7:0 in the source operand. The instruction performs a pop and discard of the first and last element on the shadow stack in the range specified by the unsigned 8-bit value in bits 7:0 of the source operand.</p>
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<h2 id="operation">Operation<a class="anchor" href="#operation">
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¶
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</a></h2>
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<pre>IF CPL = 3
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IF (CR4.CET & IA32_U_CET.SH_STK_EN) = 0
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THEN #UD; FI;
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ELSE
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IF (CR4.CET & IA32_S_CET.SH_STK_EN) = 0
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THEN #UD; FI;
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FI;
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IF (operand size is 64-bit)
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THEN
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Range := R64[7:0];
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shadow_stack_load 8 bytes from SSP;
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IF Range > 0
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THEN shadow_stack_load 8 bytes from SSP + 8 * (Range - 1);
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FI;
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SSP := SSP + Range * 8;
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ELSE
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Range := R32[7:0];
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shadow_stack_load 4 bytes from SSP;
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IF Range > 0
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THEN shadow_stack_load 4 bytes from SSP + 4 * (Range - 1);
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FI;
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SSP := SSP + Range * 4;
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FI;
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</pre>
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<h2 id="flags-affected">Flags Affected<a class="anchor" href="#flags-affected">
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¶
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</a></h2>
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<p>None.</p>
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<h2 id="intel-c-c++-compiler-intrinsic-equivalent">Intel C/C++ Compiler Intrinsic Equivalent<a class="anchor" href="#intel-c-c++-compiler-intrinsic-equivalent">
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¶
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</a></h2>
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<pre>INCSSPD void _incsspd(int);
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</pre>
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<pre>INCSSPQ void _incsspq(int);
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</pre>
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<h2 class="exceptions" id="protected-mode-exceptions">Protected Mode Exceptions<a class="anchor" href="#protected-mode-exceptions">
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¶
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</a></h2>
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<table>
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<tr>
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<td rowspan="4">#UD</td>
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<td>If the LOCK prefix is used.</td></tr>
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<tr>
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<td>If CR4.CET = 0.</td></tr>
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<tr>
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<td>IF CPL = 3 and IA32_U_CET.SH_STK_EN = 0.</td></tr>
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<tr>
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<td>IF CPL < 3 and IA32_S_CET.SH_STK_EN = 0.</td></tr>
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<tr>
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<td>#PF(fault-code)</td>
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<td>If a page fault occurs.</td></tr></table>
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<h2 class="exceptions" id="real-address-mode-exceptions">Real-Address Mode Exceptions<a class="anchor" href="#real-address-mode-exceptions">
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¶
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</a></h2>
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<table>
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<tr>
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<td>#UD</td>
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<td>The INCSSP instruction is not recognized in real-address mode.</td></tr></table>
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<h2 class="exceptions" id="virtual-8086-mode-exceptions">Virtual-8086 Mode Exceptions<a class="anchor" href="#virtual-8086-mode-exceptions">
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¶
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</a></h2>
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<table>
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<tr>
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<td>#UD</td>
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<td>The INCSSP instruction is not recognized in virtual-8086 mode.</td></tr></table>
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<h2 class="exceptions" id="compatibility-mode-exceptions">Compatibility Mode Exceptions<a class="anchor" href="#compatibility-mode-exceptions">
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¶
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</a></h2>
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<p>Same exceptions as in protected mode.</p>
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<h2 class="exceptions" id="64-bit-mode-exceptions">64-Bit Mode Exceptions<a class="anchor" href="#64-bit-mode-exceptions">
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¶
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</a></h2>
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<p>Same exceptions as in protected mode.</p><footer><p>
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This UNOFFICIAL, mechanically-separated, non-verified reference is provided for convenience, but it may be
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inc<span style="opacity: 0.2">omp</span>lete or b<sub>r</sub>oke<sub>n</sub> in various obvious or non-obvious
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ways. Refer to <a href="https://software.intel.com/en-us/download/intel-64-and-ia-32-architectures-sdm-combined-volumes-1-2a-2b-2c-2d-3a-3b-3c-3d-and-4">Intel® 64 and IA-32 Architectures Software Developer’s Manual</a> for anything serious.
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</p></footer></body></html>
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