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<!DOCTYPE html>
<html xmlns="http://www.w3.org/1999/xhtml" xmlns:svg="http://www.w3.org/2000/svg" xmlns:x86="http://www.felixcloutier.com/x86"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8"><link rel="stylesheet" type="text/css" href="style.css"></link><title>EMODPE
— Extend an EPC Page Permissions</title></head><body><header><nav><ul><li><a href='index.html'>Index</a></li><li>December 2023</li></ul></nav></header><h1>EMODPE
— Extend an EPC Page Permissions</h1>
<table>
<tr>
<th>Opcode/Instruction</th>
<th>Op/En</th>
<th>64/32 bit Mode Support</th>
<th>CPUID Feature Flag</th>
<th>Description</th></tr>
<tr>
<td>EAX = 06H ENCLU[EMODPE]</td>
<td>IR</td>
<td>V/V</td>
<td>SGX2</td>
<td>This leaf function extends the access rights of an existing EPC page.</td></tr></table>
<h2 id="instruction-operand-encoding">Instruction Operand Encoding<a class="anchor" href="#instruction-operand-encoding">
</a></h2>
<table>
<tr>
<td>Op/En</td>
<td>EAX</td>
<td>RBX</td>
<td>RCX</td></tr>
<tr>
<td>IR</td>
<td>EMODPE (In)</td>
<td>Address of a SECINFO (In)</td>
<td>Address of the destination EPC page (In)</td></tr></table>
<h3 id="description">Description<a class="anchor" href="#description">
</a></h3>
<p>This leaf function extends the access rights associated with an existing EPC page in the running enclave. THE RWX bits of the SECINFO parameter are treated as a permissions mask; supplying a value that does not extend the page permissions will have no effect. This instruction leaf can only be executed when inside the enclave.</p>
<p>RBX contains the effective address of a SECINFO structure while RCX contains the effective address of an EPC page. The table below provides additional information on the memory parameter of the EMODPE leaf function.</p>
<h2 id="emodpe-memory-parameter-semantics">EMODPE Memory Parameter Semantics<a class="anchor" href="#emodpe-memory-parameter-semantics">
</a></h2>
<table>
<tr>
<td>SECINFO</td>
<td>EPCPAGE</td></tr>
<tr>
<td>Read access permitted by Non Enclave</td>
<td>Read access permitted by Enclave</td></tr></table>
<p>The instruction faults if any of the following:</p>
<h2 id="emodpe-faulting-conditions">EMODPE Faulting Conditions<a class="anchor" href="#emodpe-faulting-conditions">
</a></h2>
<table>
<tr>
<td>The operands are not properly aligned.</td>
<td>If security attributes of the SECINFO page make the page inaccessible.</td></tr>
<tr>
<td>The EPC page is locked by another thread.</td>
<td>RBX does not contain an effective address in an EPC page in the running enclave.</td></tr>
<tr>
<td>The EPC page is not valid.</td>
<td>RCX does not contain an effective address of an EPC page in the running enclave.</td></tr>
<tr>
<td>SECINFO contains an invalid request.</td>
<td></td></tr></table>
<h3 id="concurrency-restrictions">Concurrency Restrictions<a class="anchor" href="#concurrency-restrictions">
</a></h3>
<figure id="tbl-38-70">
<table>
<tr>
<th rowspan="2">Leaf</th>
<th rowspan="2">Parameter</th>
<th colspan="3">Base Concurrency Restrictions</th></tr>
<tr>
<th>Access</th>
<th>On Conflict</th>
<th>SGX_CONFLICT VM Exit Qualification</th></tr>
<tr>
<td rowspan="2">EMODPE</td>
<td>Target [DS:RCX]</td>
<td>Concurrent</td>
<td></td>
<td></td></tr>
<tr>
<td>SECINFO [DS:RBX]</td>
<td>Concurrent</td>
<td></td>
<td></td></tr></table>
<figcaption><span class="not-imported">Table 38-70</span>. Base Concurrency Restrictions of EMODPE</figcaption></figure>
<figure id="tbl-38-71">
<table>
<tr>
<th rowspan="3">Leaf</th>
<th rowspan="3">Parameter</th>
<th colspan="6">Additional Concurrency Restrictions</th></tr>
<tr>
<th colspan="2">vs. EACCEPT, EACCEPTCOPY, EMODPE, EMODPR, EMODT</th>
<th colspan="2">vs. EADD, EEXTEND, EINIT</th>
<th colspan="2">vs. ETRACK, ETRACKC</th></tr>
<tr>
<th>Access</th>
<th>On Conflict</th>
<th>Access</th>
<th>On Conflict</th>
<th>Access</th>
<th>On Conflict</th></tr>
<tr>
<td rowspan="2">EMODPE</td>
<td>Target [DS:RCX]</td>
<td>Exclusive</td>
<td>#GP</td>
<td>Concurrent</td>
<td></td>
<td>Concurrent</td>
<td></td></tr>
<tr>
<td>SECINFO [DS:RBX]</td>
<td>Concurrent</td>
<td></td>
<td>Concurrent</td>
<td></td>
<td>Concurrent</td>
<td></td></tr></table>
<figcaption><span class="not-imported">Table 38-71</span>. Additional Concurrency Restrictions of EMODPE</figcaption></figure>
<h3 id="operation">Operation<a class="anchor" href="#operation">
</a></h3>
<h2 id="temp-variables-in-emodpe-operational-flow">Temp Variables in EMODPE Operational Flow<a class="anchor" href="#temp-variables-in-emodpe-operational-flow">
</a></h2>
<table>
<tr>
<th>Name</th>
<th>Type</th>
<th>Size (bits)</th>
<th>Description</th></tr>
<tr>
<td>SCRATCH_SECINFO</td>
<td>SECINFO</td>
<td>512</td>
<td>Scratch storage for holding the contents of DS:RBX.</td></tr></table>
<p>IF (DS:RBX is not 64Byte Aligned)</p>
<p>THEN #GP(0); FI;</p>
<p>IF (DS:RCX is not 4KByte Aligned)</p>
<p>THEN #GP(0); FI;</p>
<p>IF ((DS:RBX is not within CR_ELRANGE) or (DS:RCX is not within CR_ELRANGE) )</p>
<p>THEN #GP(0); FI;</p>
<p>IF (DS:RBX does not resolve within an EPC)</p>
<p>THEN #PF(DS:RBX); FI;</p>
<p>IF (DS:RCX does not resolve within an EPC)</p>
<p>THEN #PF(DS:RCX); FI;</p>
<p>IF ( (EPCM(DS:RBX).VALID = 0) or (EPCM(DS:RBX).R = 0) or (EPCM(DS:RBX).PENDING ≠ 0) or (EPCM(DS:RBX).MODIFIED ≠ 0) or</p>
<p>(EPCM(DS:RBX).BLOCKED ≠ 0) or (EPCM(DS:RBX).PT ≠ PT_REG) or (EPCM(DS:RBX).ENCLAVESECS ≠ CR_ACTIVE_SECS) or</p>
<p>(EPCM(DS:RBX).ENCLAVEADDRESS ≠ (DS:RBX &amp; ~0xFFF)) )</p>
<p>THEN #PF(DS:RBX); FI;</p>
<p>SCRATCH_SECINFO := DS:RBX;</p>
<p>(* Check for misconfigured SECINFO flags*)</p>
<p>IF (SCRATCH_SECINFO reserved fields are not zero )</p>
<p>THEN #GP(0); FI;</p>
<p>(* Check security attributes of the EPC page *)</p>
<p>IF ( (EPCM(DS:RCX).VALID = 0) or (EPCM(DS:RCX).PENDING ≠ 0) or (EPCM(DS:RCX).MODIFIED ≠ 0) or</p>
<p>(EPCM(DS:RCX).BLOCKED ≠ 0) or (EPCM(DS:RCX).PT ≠ PT_REG) or (EPCM(DS:RCX).ENCLAVESECS ≠ CR_ACTIVE_SECS) )</p>
<p>THEN #PF(DS:RCX); FI;</p>
<p>(* Check the EPC page for concurrency *)</p>
<p>IF (EPC page in use by another SGX2 instruction)</p>
<p>THEN #GP(0); FI;</p>
<p>(* Re-Check security attributes of the EPC page *)</p>
<p>IF ( (EPCM(DS:RCX).VALID = 0) or (EPCM(DS:RCX).PENDING ≠ 0) or (EPCM(DS:RCX).MODIFIED ≠ 0) or</p>
<p>(EPCM(DS:RCX).PT ≠ PT_REG) or (EPCM(DS:RCX).ENCLAVESECS ≠ CR_ACTIVE_SECS) or</p>
<p>(EPCM(DS:RCX).ENCLAVEADDRESS ≠ DS:RCX))</p>
<p>THEN #PF(DS:RCX); FI;</p>
<p>(* Check for misconfigured SECINFO flags*)</p>
<p>IF ( (EPCM(DS:RCX).R = 0) and (SCRATCH_SECINFO.FLAGS.R = 0) and (SCRATCH_SECINFO.FLAGS.W ≠ 0) )</p>
<p>(* Update EPCM permissions *)</p>
<p>EPCM(DS:RCX).R := EPCM(DS:RCX).R | SCRATCH_SECINFO.FLAGS.R;</p>
<p>EPCM(DS:RCX).W := EPCM(DS:RCX).W | SCRATCH_SECINFO.FLAGS.W;</p>
<p>EPCM(DS:RCX).X := EPCM(DS:RCX).X | SCRATCH_SECINFO.FLAGS.X;</p>
<h3 id="flags-affected">Flags Affected<a class="anchor" href="#flags-affected">
</a></h3>
<p>None</p>
<h3 class="exceptions" id="protected-mode-exceptions">Protected Mode Exceptions<a class="anchor" href="#protected-mode-exceptions">
</a></h3>
<table>
<tr>
<td rowspan="4">#GP(0)</td>
<td>If executed outside an enclave.</td></tr>
<tr>
<td>If a memory operand effective address is outside the DS segment limit.</td></tr>
<tr>
<td>If a memory operand is not properly aligned.</td></tr>
<tr>
<td>If a memory operand is locked.</td></tr>
<tr>
<td>#PF(error</td>
<td>code) If a page fault occurs in accessing memory operands.</td></tr></table>
<h3 class="exceptions" id="64-bit-mode-exceptions">64-Bit Mode Exceptions<a class="anchor" href="#64-bit-mode-exceptions">
</a></h3>
<table>
<tr>
<td rowspan="4">#GP(0)</td>
<td>If executed outside an enclave.</td></tr>
<tr>
<td>If a memory operand is non-canonical form.</td></tr>
<tr>
<td>If a memory operand is not properly aligned.</td></tr>
<tr>
<td>If a memory operand is locked.</td></tr>
<tr>
<td>#PF(error</td>
<td>code) If a page fault occurs in accessing memory operands.</td></tr></table><footer><p>
This UNOFFICIAL, mechanically-separated, non-verified reference is provided for convenience, but it may be
inc<span style="opacity: 0.2">omp</span>lete or b<sub>r</sub>oke<sub>n</sub> in various obvious or non-obvious
ways. Refer to <a href="https://software.intel.com/en-us/download/intel-64-and-ia-32-architectures-sdm-combined-volumes-1-2a-2b-2c-2d-3a-3b-3c-3d-and-4">Intel® 64 and IA-32 Architectures Software Developer’s Manual</a> for anything serious.
</p></footer></body></html>
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