ia32-64/inst.list
2025-07-08 02:23:29 -03:00

1222 lines
84 KiB
Text
Raw Permalink Blame History

This file contains ambiguous Unicode characters

This file contains Unicode characters that might be confused with other characters. If you think that this is intentional, you can safely ignore this warning. Use the Escape button to reveal them.

AAA|ASCII Adjust After Addition|aaa
AAD|ASCII Adjust AX Before Division|aad
AAM|ASCII Adjust AX After Multiply|aam
AAS|ASCII Adjust AL After Subtraction|aas
ADC|Add With Carry|adc
ADCX|Unsigned Integer Addition of Two Operands With Carry Flag|adcx
ADD|Add|add
ADDPD|Add Packed Double Precision Floating-Point Values|addpd
ADDPS|Add Packed Single Precision Floating-Point Values|addps
ADDSD|Add Scalar Double Precision Floating-Point Values|addsd
ADDSS|Add Scalar Single Precision Floating-Point Values|addss
ADDSUBPD|Packed Double Precision Floating-Point Add/Subtract|addsubpd
ADDSUBPS|Packed Single Precision Floating-Point Add/Subtract|addsubps
ADOX|Unsigned Integer Addition of Two Operands With Overflow Flag|adox
AESDEC|Perform One Round of an AES Decryption Flow|aesdec
AESDEC128KL|Perform Ten Rounds of AES Decryption Flow With Key Locker Using 128-BitKey|aesdec128kl
AESDEC256KL|Perform 14 Rounds of AES Decryption Flow With Key Locker Using 256-Bit Key|aesdec256kl
AESDECLAST|Perform Last Round of an AES Decryption Flow|aesdeclast
AESDECWIDE128KL|Perform Ten Rounds of AES Decryption Flow With Key Locker on 8 BlocksUsing 128-Bit Key|aesdecwide128kl
AESDECWIDE256KL|Perform 14 Rounds of AES Decryption Flow With Key Locker on 8 BlocksUsing 256-Bit Key|aesdecwide256kl
AESENC|Perform One Round of an AES Encryption Flow|aesenc
AESENC128KL|Perform Ten Rounds of AES Encryption Flow With Key Locker Using 128-Bit Key|aesenc128kl
AESENC256KL|Perform 14 Rounds of AES Encryption Flow With Key Locker Using 256-Bit Key|aesenc256kl
AESENCLAST|Perform Last Round of an AES Encryption Flow|aesenclast
AESENCWIDE128KL|Perform Ten Rounds of AES Encryption Flow With Key Locker on 8 BlocksUsing 128-Bit Key|aesencwide128kl
AESENCWIDE256KL|Perform 14 Rounds of AES Encryption Flow With Key Locker on 8 BlocksUsing 256-Bit Key|aesencwide256kl
AESIMC|Perform the AES InvMixColumn Transformation|aesimc
AESKEYGENASSIST|AES Round Key Generation Assist|aeskeygenassist
AND|Logical AND|and
ANDN|Logical AND NOT|andn
ANDNPD|Bitwise Logical AND NOT of Packed Double Precision Floating-Point Values|andnpd
ANDNPS|Bitwise Logical AND NOT of Packed Single Precision Floating-Point Values|andnps
ANDPD|Bitwise Logical AND of Packed Double Precision Floating-Point Values|andpd
ANDPS|Bitwise Logical AND of Packed Single Precision Floating-Point Values|andps
ARPL|Adjust RPL Field of Segment Selector|arpl
BEXTR|Bit Field Extract|bextr
BLENDPD|Blend Packed Double Precision Floating-Point Values|blendpd
BLENDPS|Blend Packed Single Precision Floating-Point Values|blendps
BLENDVPD|Variable Blend Packed Double Precision Floating-Point Values|blendvpd
BLENDVPS|Variable Blend Packed Single Precision Floating-Point Values|blendvps
BLSI|Extract Lowest Set Isolated Bit|blsi
BLSMSK|Get Mask Up to Lowest Set Bit|blsmsk
BLSR|Reset Lowest Set Bit|blsr
BNDCL|Check Lower Bound|bndcl
BNDCN|Check Upper Bound|bndcu.bndcn
BNDCU|Check Upper Bound|bndcu.bndcn
BNDLDX|Load Extended Bounds Using Address Translation|bndldx
BNDMK|Make Bounds|bndmk
BNDMOV|Move Bounds|bndmov
BNDSTX|Store Extended Bounds Using Address Translation|bndstx
BOUND|Check Array Index Against Bounds|bound
BSF|Bit Scan Forward|bsf
BSR|Bit Scan Reverse|bsr
BSWAP|Byte Swap|bswap
BT|Bit Test|bt
BTC|Bit Test and Complement|btc
BTR|Bit Test and Reset|btr
BTS|Bit Test and Set|bts
BZHI|Zero High Bits Starting with Specified Bit Position|bzhi
CALL|Call Procedure|call
CBW|Convert Byte to Word/Convert Word to Doubleword/Convert Doubleword toQuadword|cbw.cwde.cdqe
CDQ|Convert Word to Doubleword/Convert Doubleword to Quadword|cwd.cdq.cqo
CDQE|Convert Byte to Word/Convert Word to Doubleword/Convert Doubleword toQuadword|cbw.cwde.cdqe
CLAC|Clear AC Flag in EFLAGS Register|clac
CLC|Clear Carry Flag|clc
CLD|Clear Direction Flag|cld
CLDEMOTE|Cache Line Demote|cldemote
CLFLUSH|Flush Cache Line|clflush
CLFLUSHOPT|Flush Cache Line Optimized|clflushopt
CLI|Clear Interrupt Flag|cli
CLRSSBSY|Clear Busy Flag in a Supervisor Shadow Stack Token|clrssbsy
CLTS|Clear Task-Switched Flag in CR0|clts
CLUI|Clear User Interrupt Flag|clui
CLWB|Cache Line Write Back|clwb
CMC|Complement Carry Flag|cmc
CMOVcc|Conditional Move|cmovcc
CMP|Compare Two Operands|cmp
CMPPD|Compare Packed Double Precision Floating-Point Values|cmppd
CMPPS|Compare Packed Single Precision Floating-Point Values|cmpps
CMPS|Compare String Operands|cmps.cmpsb.cmpsw.cmpsd.cmpsq
CMPSB|Compare String Operands|cmps.cmpsb.cmpsw.cmpsd.cmpsq
CMPSD|Compare String Operands|cmps.cmpsb.cmpsw.cmpsd.cmpsq
CMPSD|Compare Scalar Double Precision Floating-Point Value|cmpsd
CMPSQ|Compare String Operands|cmps.cmpsb.cmpsw.cmpsd.cmpsq
CMPSS|Compare Scalar Single Precision Floating-Point Value|cmpss
CMPSW|Compare String Operands|cmps.cmpsb.cmpsw.cmpsd.cmpsq
CMPXCHG|Compare and Exchange|cmpxchg
CMPXCHG16B|Compare and Exchange Bytes|cmpxchg8b.cmpxchg16b
CMPXCHG8B|Compare and Exchange Bytes|cmpxchg8b.cmpxchg16b
COMISD|Compare Scalar Ordered Double Precision Floating-Point Values and Set EFLAGS|comisd
COMISS|Compare Scalar Ordered Single Precision Floating-Point Values and Set EFLAGS|comiss
CPUID|CPU Identification|cpuid
CQO|Convert Word to Doubleword/Convert Doubleword to Quadword|cwd.cdq.cqo
CRC32|Accumulate CRC32 Value|crc32
CVTDQ2PD|Convert Packed Doubleword Integers to Packed Double Precision Floating-PointValues|cvtdq2pd
CVTDQ2PS|Convert Packed Doubleword Integers to Packed Single Precision Floating-PointValues|cvtdq2ps
CVTPD2DQ|Convert Packed Double Precision Floating-Point Values to Packed DoublewordIntegers|cvtpd2dq
CVTPD2PI|Convert Packed Double Precision Floating-Point Values to Packed Dword Integers|cvtpd2pi
CVTPD2PS|Convert Packed Double Precision Floating-Point Values to Packed Single PrecisionFloating-Point Values|cvtpd2ps
CVTPI2PD|Convert Packed Dword Integers to Packed Double Precision Floating-Point Values|cvtpi2pd
CVTPI2PS|Convert Packed Dword Integers to Packed Single Precision Floating-Point Values|cvtpi2ps
CVTPS2DQ|Convert Packed Single Precision Floating-Point Values to Packed SignedDoubleword Integer Values|cvtps2dq
CVTPS2PD|Convert Packed Single Precision Floating-Point Values to Packed Double PrecisionFloating-Point Values|cvtps2pd
CVTPS2PI|Convert Packed Single Precision Floating-Point Values to Packed Dword Integers|cvtps2pi
CVTSD2SI|Convert Scalar Double Precision Floating-Point Value to Doubleword Integer|cvtsd2si
CVTSD2SS|Convert Scalar Double Precision Floating-Point Value to Scalar Single PrecisionFloating-Point Value|cvtsd2ss
CVTSI2SD|Convert Doubleword Integer to Scalar Double Precision Floating-Point Value|cvtsi2sd
CVTSI2SS|Convert Doubleword Integer to Scalar Single Precision Floating-Point Value|cvtsi2ss
CVTSS2SD|Convert Scalar Single Precision Floating-Point Value to Scalar Double PrecisionFloating-Point Value|cvtss2sd
CVTSS2SI|Convert Scalar Single Precision Floating-Point Value to Doubleword Integer|cvtss2si
CVTTPD2DQ|Convert with Truncation Packed Double Precision Floating-Point Values toPacked Doubleword Integers|cvttpd2dq
CVTTPD2PI|Convert With Truncation Packed Double Precision Floating-Point Values to PackedDword Integers|cvttpd2pi
CVTTPS2DQ|Convert With Truncation Packed Single Precision Floating-Point Values to PackedSigned Doubleword Integer Values|cvttps2dq
CVTTPS2PI|Convert With Truncation Packed Single Precision Floating-Point Values to PackedDword Integers|cvttps2pi
CVTTSD2SI|Convert With Truncation Scalar Double Precision Floating-Point Value to SignedInteger|cvttsd2si
CVTTSS2SI|Convert With Truncation Scalar Single Precision Floating-Point Value to Integer|cvttss2si
CWD|Convert Word to Doubleword/Convert Doubleword to Quadword|cwd.cdq.cqo
CWDE|Convert Byte to Word/Convert Word to Doubleword/Convert Doubleword toQuadword|cbw.cwde.cdqe
DAA|Decimal Adjust AL After Addition|daa
DAS|Decimal Adjust AL After Subtraction|das
DEC|Decrement by 1|dec
DIV|Unsigned Divide|div
DIVPD|Divide Packed Double Precision Floating-Point Values|divpd
DIVPS|Divide Packed Single Precision Floating-Point Values|divps
DIVSD|Divide Scalar Double Precision Floating-Point Value|divsd
DIVSS|Divide Scalar Single Precision Floating-Point Values|divss
DPPD|Dot Product of Packed Double Precision Floating-Point Values|dppd
DPPS|Dot Product of Packed Single Precision Floating-Point Values|dpps
EMMS|Empty MMX Technology State|emms
ENCODEKEY128|Encode 128-Bit Key With Key Locker|encodekey128
ENCODEKEY256|Encode 256-Bit Key With Key Locker|encodekey256
ENDBR32|Terminate an Indirect Branch in 32-bit and Compatibility Mode|endbr32
ENDBR64|Terminate an Indirect Branch in 64-bit Mode|endbr64
ENQCMD|Enqueue Command|enqcmd
ENQCMDS|Enqueue Command Supervisor|enqcmds
ENTER|Make Stack Frame for Procedure Parameters|enter
EXTRACTPS|Extract Packed Floating-Point Values|extractps
F2XM1|Compute 2x1|f2xm1
FABS|Absolute Value|fabs
FADD|Add|fadd.faddp.fiadd
FADDP|Add|fadd.faddp.fiadd
FBLD|Load Binary Coded Decimal|fbld
FBSTP|Store BCD Integer and Pop|fbstp
FCHS|Change Sign|fchs
FCLEX|Clear Exceptions|fclex.fnclex
FCMOVcc|Floating-Point Conditional Move|fcmovcc
FCOM|Compare Floating-Point Values|fcom.fcomp.fcompp
FCOMI|Compare Floating-Point Values and Set EFLAGS|fcomi.fcomip.fucomi.fucomip
FCOMIP|Compare Floating-Point Values and Set EFLAGS|fcomi.fcomip.fucomi.fucomip
FCOMP|Compare Floating-Point Values|fcom.fcomp.fcompp
FCOMPP|Compare Floating-Point Values|fcom.fcomp.fcompp
FCOS|Cosine|fcos
FDECSTP|Decrement Stack-Top Pointer|fdecstp
FDIV|Divide|fdiv.fdivp.fidiv
FDIVP|Divide|fdiv.fdivp.fidiv
FDIVR|Reverse Divide|fdivr.fdivrp.fidivr
FDIVRP|Reverse Divide|fdivr.fdivrp.fidivr
FFREE|Free Floating-Point Register|ffree
FIADD|Add|fadd.faddp.fiadd
FICOM|Compare Integer|ficom.ficomp
FICOMP|Compare Integer|ficom.ficomp
FIDIV|Divide|fdiv.fdivp.fidiv
FIDIVR|Reverse Divide|fdivr.fdivrp.fidivr
FILD|Load Integer|fild
FIMUL|Multiply|fmul.fmulp.fimul
FINCSTP|Increment Stack-Top Pointer|fincstp
FINIT|Initialize Floating-Point Unit|finit.fninit
FIST|Store Integer|fist.fistp
FISTP|Store Integer|fist.fistp
FISTTP|Store Integer With Truncation|fisttp
FISUB|Subtract|fsub.fsubp.fisub
FISUBR|Reverse Subtract|fsubr.fsubrp.fisubr
FLD|Load Floating-Point Value|fld
FLD1|Load Constant|fld1.fldl2t.fldl2e.fldpi.fldlg2.fldln2.fldz
FLDCW|Load x87 FPU Control Word|fldcw
FLDENV|Load x87 FPU Environment|fldenv
FLDL2E|Load Constant|fld1.fldl2t.fldl2e.fldpi.fldlg2.fldln2.fldz
FLDL2T|Load Constant|fld1.fldl2t.fldl2e.fldpi.fldlg2.fldln2.fldz
FLDLG2|Load Constant|fld1.fldl2t.fldl2e.fldpi.fldlg2.fldln2.fldz
FLDLN2|Load Constant|fld1.fldl2t.fldl2e.fldpi.fldlg2.fldln2.fldz
FLDPI|Load Constant|fld1.fldl2t.fldl2e.fldpi.fldlg2.fldln2.fldz
FLDZ|Load Constant|fld1.fldl2t.fldl2e.fldpi.fldlg2.fldln2.fldz
FMUL|Multiply|fmul.fmulp.fimul
FMULP|Multiply|fmul.fmulp.fimul
FNCLEX|Clear Exceptions|fclex.fnclex
FNINIT|Initialize Floating-Point Unit|finit.fninit
FNOP|No Operation|fnop
FNSAVE|Store x87 FPU State|fsave.fnsave
FNSTCW|Store x87 FPU Control Word|fstcw.fnstcw
FNSTENV|Store x87 FPU Environment|fstenv.fnstenv
FNSTSW|Store x87 FPU Status Word|fstsw.fnstsw
FPATAN|Partial Arctangent|fpatan
FPREM|Partial Remainder|fprem
FPREM1|Partial Remainder|fprem1
FPTAN|Partial Tangent|fptan
FRNDINT|Round to Integer|frndint
FRSTOR|Restore x87 FPU State|frstor
FSAVE|Store x87 FPU State|fsave.fnsave
FSCALE|Scale|fscale
FSIN|Sine|fsin
FSINCOS|Sine and Cosine|fsincos
FSQRT|Square Root|fsqrt
FST|Store Floating-Point Value|fst.fstp
FSTCW|Store x87 FPU Control Word|fstcw.fnstcw
FSTENV|Store x87 FPU Environment|fstenv.fnstenv
FSTP|Store Floating-Point Value|fst.fstp
FSTSW|Store x87 FPU Status Word|fstsw.fnstsw
FSUB|Subtract|fsub.fsubp.fisub
FSUBP|Subtract|fsub.fsubp.fisub
FSUBR|Reverse Subtract|fsubr.fsubrp.fisubr
FSUBRP|Reverse Subtract|fsubr.fsubrp.fisubr
FTST|TEST|ftst
FUCOM|Unordered Compare Floating-Point Values|fucom.fucomp.fucompp
FUCOMI|Compare Floating-Point Values and Set EFLAGS|fcomi.fcomip.fucomi.fucomip
FUCOMIP|Compare Floating-Point Values and Set EFLAGS|fcomi.fcomip.fucomi.fucomip
FUCOMP|Unordered Compare Floating-Point Values|fucom.fucomp.fucompp
FUCOMPP|Unordered Compare Floating-Point Values|fucom.fucomp.fucompp
FWAIT|Wait|wait.fwait
FXAM|Examine Floating-Point|fxam
FXCH|Exchange Register Contents|fxch
FXRSTOR|Restore x87 FPU, MMX, XMM, and MXCSR State|fxrstor
FXSAVE|Save x87 FPU, MMX Technology, and SSE State|fxsave
FXTRACT|Extract Exponent and Significand|fxtract
FYL2X|Compute y log2x|fyl2x
FYL2XP1|Compute y log2(x +1)|fyl2xp1
GF2P8AFFINEINVQB|Galois Field Affine Transformation Inverse|gf2p8affineinvqb
GF2P8AFFINEQB|Galois Field Affine Transformation|gf2p8affineqb
GF2P8MULB|Galois Field Multiply Bytes|gf2p8mulb
HADDPD|Packed Double Precision Floating-Point Horizontal Add|haddpd
HADDPS|Packed Single Precision Floating-Point Horizontal Add|haddps
HLT|Halt|hlt
HRESET|History Reset|hreset
HSUBPD|Packed Double Precision Floating-Point Horizontal Subtract|hsubpd
HSUBPS|Packed Single Precision Floating-Point Horizontal Subtract|hsubps
IDIV|Signed Divide|idiv
IMUL|Signed Multiply|imul
IN|Input From Port|in
INC|Increment by 1|inc
INCSSPD|Increment Shadow Stack Pointer|incsspd.incsspq
INCSSPQ|Increment Shadow Stack Pointer|incsspd.incsspq
INS|Input from Port to String|ins.insb.insw.insd
INSB|Input from Port to String|ins.insb.insw.insd
INSD|Input from Port to String|ins.insb.insw.insd
INSERTPS|Insert Scalar Single Precision Floating-Point Value|insertps
INSW|Input from Port to String|ins.insb.insw.insd
INT n|Call to Interrupt Procedure|intn.into.int3.int1
INT1|Call to Interrupt Procedure|intn.into.int3.int1
INT3|Call to Interrupt Procedure|intn.into.int3.int1
INTO|Call to Interrupt Procedure|intn.into.int3.int1
INVD|Invalidate Internal Caches|invd
INVLPG|Invalidate TLB Entries|invlpg
INVPCID|Invalidate Process-Context Identifier|invpcid
IRET|Interrupt Return|iret.iretd.iretq
IRETD|Interrupt Return|iret.iretd.iretq
IRETQ|Interrupt Return|iret.iretd.iretq
JMP|Jump|jmp
Jcc|Jump if Condition Is Met|jcc
KADDB|ADD Two Masks|kaddw.kaddb.kaddq.kaddd
KADDD|ADD Two Masks|kaddw.kaddb.kaddq.kaddd
KADDQ|ADD Two Masks|kaddw.kaddb.kaddq.kaddd
KADDW|ADD Two Masks|kaddw.kaddb.kaddq.kaddd
KANDB|Bitwise Logical AND Masks|kandw.kandb.kandq.kandd
KANDD|Bitwise Logical AND Masks|kandw.kandb.kandq.kandd
KANDNB|Bitwise Logical AND NOT Masks|kandnw.kandnb.kandnq.kandnd
KANDND|Bitwise Logical AND NOT Masks|kandnw.kandnb.kandnq.kandnd
KANDNQ|Bitwise Logical AND NOT Masks|kandnw.kandnb.kandnq.kandnd
KANDNW|Bitwise Logical AND NOT Masks|kandnw.kandnb.kandnq.kandnd
KANDQ|Bitwise Logical AND Masks|kandw.kandb.kandq.kandd
KANDW|Bitwise Logical AND Masks|kandw.kandb.kandq.kandd
KMOVB|Move From and to Mask Registers|kmovw.kmovb.kmovq.kmovd
KMOVD|Move From and to Mask Registers|kmovw.kmovb.kmovq.kmovd
KMOVQ|Move From and to Mask Registers|kmovw.kmovb.kmovq.kmovd
KMOVW|Move From and to Mask Registers|kmovw.kmovb.kmovq.kmovd
KNOTB|NOT Mask Register|knotw.knotb.knotq.knotd
KNOTD|NOT Mask Register|knotw.knotb.knotq.knotd
KNOTQ|NOT Mask Register|knotw.knotb.knotq.knotd
KNOTW|NOT Mask Register|knotw.knotb.knotq.knotd
KORB|Bitwise Logical OR Masks|korw.korb.korq.kord
KORD|Bitwise Logical OR Masks|korw.korb.korq.kord
KORQ|Bitwise Logical OR Masks|korw.korb.korq.kord
KORTESTB|OR Masks and Set Flags|kortestw.kortestb.kortestq.kortestd
KORTESTD|OR Masks and Set Flags|kortestw.kortestb.kortestq.kortestd
KORTESTQ|OR Masks and Set Flags|kortestw.kortestb.kortestq.kortestd
KORTESTW|OR Masks and Set Flags|kortestw.kortestb.kortestq.kortestd
KORW|Bitwise Logical OR Masks|korw.korb.korq.kord
KSHIFTLB|Shift Left Mask Registers|kshiftlw.kshiftlb.kshiftlq.kshiftld
KSHIFTLD|Shift Left Mask Registers|kshiftlw.kshiftlb.kshiftlq.kshiftld
KSHIFTLQ|Shift Left Mask Registers|kshiftlw.kshiftlb.kshiftlq.kshiftld
KSHIFTLW|Shift Left Mask Registers|kshiftlw.kshiftlb.kshiftlq.kshiftld
KSHIFTRB|Shift Right Mask Registers|kshiftrw.kshiftrb.kshiftrq.kshiftrd
KSHIFTRD|Shift Right Mask Registers|kshiftrw.kshiftrb.kshiftrq.kshiftrd
KSHIFTRQ|Shift Right Mask Registers|kshiftrw.kshiftrb.kshiftrq.kshiftrd
KSHIFTRW|Shift Right Mask Registers|kshiftrw.kshiftrb.kshiftrq.kshiftrd
KTESTB|Packed Bit Test Masks and Set Flags|ktestw.ktestb.ktestq.ktestd
KTESTD|Packed Bit Test Masks and Set Flags|ktestw.ktestb.ktestq.ktestd
KTESTQ|Packed Bit Test Masks and Set Flags|ktestw.ktestb.ktestq.ktestd
KTESTW|Packed Bit Test Masks and Set Flags|ktestw.ktestb.ktestq.ktestd
KUNPCKBW|Unpack for Mask Registers|kunpckbw.kunpckwd.kunpckdq
KUNPCKDQ|Unpack for Mask Registers|kunpckbw.kunpckwd.kunpckdq
KUNPCKWD|Unpack for Mask Registers|kunpckbw.kunpckwd.kunpckdq
KXNORB|Bitwise Logical XNOR Masks|kxnorw.kxnorb.kxnorq.kxnord
KXNORD|Bitwise Logical XNOR Masks|kxnorw.kxnorb.kxnorq.kxnord
KXNORQ|Bitwise Logical XNOR Masks|kxnorw.kxnorb.kxnorq.kxnord
KXNORW|Bitwise Logical XNOR Masks|kxnorw.kxnorb.kxnorq.kxnord
KXORB|Bitwise Logical XOR Masks|kxorw.kxorb.kxorq.kxord
KXORD|Bitwise Logical XOR Masks|kxorw.kxorb.kxorq.kxord
KXORQ|Bitwise Logical XOR Masks|kxorw.kxorb.kxorq.kxord
KXORW|Bitwise Logical XOR Masks|kxorw.kxorb.kxorq.kxord
LAHF|Load Status Flags Into AH Register|lahf
LAR|Load Access Rights Byte|lar
LDDQU|Load Unaligned Integer 128 Bits|lddqu
LDMXCSR|Load MXCSR Register|ldmxcsr
LDS|Load Far Pointer|lds.les.lfs.lgs.lss
LDTILECFG|Load Tile Configuration|ldtilecfg
LEA|Load Effective Address|lea
LEAVE|High Level Procedure Exit|leave
LES|Load Far Pointer|lds.les.lfs.lgs.lss
LFENCE|Load Fence|lfence
LFS|Load Far Pointer|lds.les.lfs.lgs.lss
LGDT|Load Global/Interrupt Descriptor Table Register|lgdt.lidt
LGS|Load Far Pointer|lds.les.lfs.lgs.lss
LIDT|Load Global/Interrupt Descriptor Table Register|lgdt.lidt
LLDT|Load Local Descriptor Table Register|lldt
LMSW|Load Machine Status Word|lmsw
LOADIWKEY|Load Internal Wrapping Key With Key Locker|loadiwkey
LOCK|Assert LOCK# Signal Prefix|lock
LODS|Load String|lods.lodsb.lodsw.lodsd.lodsq
LODSB|Load String|lods.lodsb.lodsw.lodsd.lodsq
LODSD|Load String|lods.lodsb.lodsw.lodsd.lodsq
LODSQ|Load String|lods.lodsb.lodsw.lodsd.lodsq
LODSW|Load String|lods.lodsb.lodsw.lodsd.lodsq
LOOP|Loop According to ECX Counter|loop.loopcc
LOOPcc|Loop According to ECX Counter|loop.loopcc
LSL|Load Segment Limit|lsl
LSS|Load Far Pointer|lds.les.lfs.lgs.lss
LTR|Load Task Register|ltr
LZCNT|Count the Number of Leading Zero Bits|lzcnt
MASKMOVDQU|Store Selected Bytes of Double Quadword|maskmovdqu
MASKMOVQ|Store Selected Bytes of Quadword|maskmovq
MAXPD|Maximum of Packed Double Precision Floating-Point Values|maxpd
MAXPS|Maximum of Packed Single Precision Floating-Point Values|maxps
MAXSD|Return Maximum Scalar Double Precision Floating-Point Value|maxsd
MAXSS|Return Maximum Scalar Single Precision Floating-Point Value|maxss
MFENCE|Memory Fence|mfence
MINPD|Minimum of Packed Double Precision Floating-Point Values|minpd
MINPS|Minimum of Packed Single Precision Floating-Point Values|minps
MINSD|Return Minimum Scalar Double Precision Floating-Point Value|minsd
MINSS|Return Minimum Scalar Single Precision Floating-Point Value|minss
MONITOR|Set Up Monitor Address|monitor
MOV|Move|mov
MOV|Move to/from Control Registers|mov-1
MOV|Move to/from Debug Registers|mov-2
MOVAPD|Move Aligned Packed Double Precision Floating-Point Values|movapd
MOVAPS|Move Aligned Packed Single Precision Floating-Point Values|movaps
MOVBE|Move Data After Swapping Bytes|movbe
MOVD|Move Doubleword/Move Quadword|movd.movq
MOVDDUP|Replicate Double Precision Floating-Point Values|movddup
MOVDIR64B|Move 64 Bytes as Direct Store|movdir64b
MOVDIRI|Move Doubleword as Direct Store|movdiri
MOVDQ2Q|Move Quadword from XMM to MMX Technology Register|movdq2q
MOVDQA|Move Aligned Packed Integer Values|movdqa.vmovdqa32.vmovdqa64
MOVDQU|Move Unaligned Packed Integer Values|movdqu.vmovdqu8.vmovdqu16.vmovdqu32.vmovdqu64
MOVHLPS|Move Packed Single Precision Floating-Point Values High to Low|movhlps
MOVHPD|Move High Packed Double Precision Floating-Point Value|movhpd
MOVHPS|Move High Packed Single Precision Floating-Point Values|movhps
MOVLHPS|Move Packed Single Precision Floating-Point Values Low to High|movlhps
MOVLPD|Move Low Packed Double Precision Floating-Point Value|movlpd
MOVLPS|Move Low Packed Single Precision Floating-Point Values|movlps
MOVMSKPD|Extract Packed Double Precision Floating-Point Sign Mask|movmskpd
MOVMSKPS|Extract Packed Single Precision Floating-Point Sign Mask|movmskps
MOVNTDQ|Store Packed Integers Using Non-Temporal Hint|movntdq
MOVNTDQA|Load Double Quadword Non-Temporal Aligned Hint|movntdqa
MOVNTI|Store Doubleword Using Non-Temporal Hint|movnti
MOVNTPD|Store Packed Double Precision Floating-Point Values Using Non-Temporal Hint|movntpd
MOVNTPS|Store Packed Single Precision Floating-Point Values Using Non-Temporal Hint|movntps
MOVNTQ|Store of Quadword Using Non-Temporal Hint|movntq
MOVQ|Move Doubleword/Move Quadword|movd.movq
MOVQ|Move Quadword|movq
MOVQ2DQ|Move Quadword from MMX Technology to XMM Register|movq2dq
MOVS|Move Data From String to String|movs.movsb.movsw.movsd.movsq
MOVSB|Move Data From String to String|movs.movsb.movsw.movsd.movsq
MOVSD|Move Data From String to String|movs.movsb.movsw.movsd.movsq
MOVSD|Move or Merge Scalar Double Precision Floating-Point Value|movsd
MOVSHDUP|Replicate Single Precision Floating-Point Values|movshdup
MOVSLDUP|Replicate Single Precision Floating-Point Values|movsldup
MOVSQ|Move Data From String to String|movs.movsb.movsw.movsd.movsq
MOVSS|Move or Merge Scalar Single Precision Floating-Point Value|movss
MOVSW|Move Data From String to String|movs.movsb.movsw.movsd.movsq
MOVSX|Move With Sign-Extension|movsx.movsxd
MOVSXD|Move With Sign-Extension|movsx.movsxd
MOVUPD|Move Unaligned Packed Double Precision Floating-Point Values|movupd
MOVUPS|Move Unaligned Packed Single Precision Floating-Point Values|movups
MOVZX|Move With Zero-Extend|movzx
MPSADBW|Compute Multiple Packed Sums of Absolute Difference|mpsadbw
MUL|Unsigned Multiply|mul
MULPD|Multiply Packed Double Precision Floating-Point Values|mulpd
MULPS|Multiply Packed Single Precision Floating-Point Values|mulps
MULSD|Multiply Scalar Double Precision Floating-Point Value|mulsd
MULSS|Multiply Scalar Single Precision Floating-Point Values|mulss
MULX|Unsigned Multiply Without Affecting Flags|mulx
MWAIT|Monitor Wait|mwait
NEG|Two's Complement Negation|neg
NOP|No Operation|nop
NOT|One's Complement Negation|not
OR|Logical Inclusive OR|or
ORPD|Bitwise Logical OR of Packed Double Precision Floating-Point Values|orpd
ORPS|Bitwise Logical OR of Packed Single Precision Floating-Point Values|orps
OUT|Output to Port|out
OUTS|Output String to Port|outs.outsb.outsw.outsd
OUTSB|Output String to Port|outs.outsb.outsw.outsd
OUTSD|Output String to Port|outs.outsb.outsw.outsd
OUTSW|Output String to Port|outs.outsb.outsw.outsd
PABSB|Packed Absolute Value|pabsb.pabsw.pabsd.pabsq
PABSD|Packed Absolute Value|pabsb.pabsw.pabsd.pabsq
PABSQ|Packed Absolute Value|pabsb.pabsw.pabsd.pabsq
PABSW|Packed Absolute Value|pabsb.pabsw.pabsd.pabsq
PACKSSDW|Pack With Signed Saturation|packsswb.packssdw
PACKSSWB|Pack With Signed Saturation|packsswb.packssdw
PACKUSDW|Pack With Unsigned Saturation|packusdw
PACKUSWB|Pack With Unsigned Saturation|packuswb
PADDB|Add Packed Integers|paddb.paddw.paddd.paddq
PADDD|Add Packed Integers|paddb.paddw.paddd.paddq
PADDQ|Add Packed Integers|paddb.paddw.paddd.paddq
PADDSB|Add Packed Signed Integers with Signed Saturation|paddsb.paddsw
PADDSW|Add Packed Signed Integers with Signed Saturation|paddsb.paddsw
PADDUSB|Add Packed Unsigned Integers With Unsigned Saturation|paddusb.paddusw
PADDUSW|Add Packed Unsigned Integers With Unsigned Saturation|paddusb.paddusw
PADDW|Add Packed Integers|paddb.paddw.paddd.paddq
PALIGNR|Packed Align Right|palignr
PAND|Logical AND|pand
PANDN|Logical AND NOT|pandn
PAUSE|Spin Loop Hint|pause
PAVGB|Average Packed Integers|pavgb.pavgw
PAVGW|Average Packed Integers|pavgb.pavgw
PBLENDVB|Variable Blend Packed Bytes|pblendvb
PBLENDW|Blend Packed Words|pblendw
PCLMULQDQ|Carry-Less Multiplication Quadword|pclmulqdq
PCMPEQB|Compare Packed Data for Equal|pcmpeqb.pcmpeqw.pcmpeqd
PCMPEQD|Compare Packed Data for Equal|pcmpeqb.pcmpeqw.pcmpeqd
PCMPEQQ|Compare Packed Qword Data for Equal|pcmpeqq
PCMPEQW|Compare Packed Data for Equal|pcmpeqb.pcmpeqw.pcmpeqd
PCMPESTRI|Packed Compare Explicit Length Strings, Return Index|pcmpestri
PCMPESTRM|Packed Compare Explicit Length Strings, Return Mask|pcmpestrm
PCMPGTB|Compare Packed Signed Integers for Greater Than|pcmpgtb.pcmpgtw.pcmpgtd
PCMPGTD|Compare Packed Signed Integers for Greater Than|pcmpgtb.pcmpgtw.pcmpgtd
PCMPGTQ|Compare Packed Data for Greater Than|pcmpgtq
PCMPGTW|Compare Packed Signed Integers for Greater Than|pcmpgtb.pcmpgtw.pcmpgtd
PCMPISTRI|Packed Compare Implicit Length Strings, Return Index|pcmpistri
PCMPISTRM|Packed Compare Implicit Length Strings, Return Mask|pcmpistrm
PCONFIG|Platform Configuration|pconfig
PDEP|Parallel Bits Deposit|pdep
PEXT|Parallel Bits Extract|pext
PEXTRB|Extract Byte/Dword/Qword|pextrb.pextrd.pextrq
PEXTRD|Extract Byte/Dword/Qword|pextrb.pextrd.pextrq
PEXTRQ|Extract Byte/Dword/Qword|pextrb.pextrd.pextrq
PEXTRW|Extract Word|pextrw
PHADDD|Packed Horizontal Add|phaddw.phaddd
PHADDSW|Packed Horizontal Add and Saturate|phaddsw
PHADDW|Packed Horizontal Add|phaddw.phaddd
PHMINPOSUW|Packed Horizontal Word Minimum|phminposuw
PHSUBD|Packed Horizontal Subtract|phsubw.phsubd
PHSUBSW|Packed Horizontal Subtract and Saturate|phsubsw
PHSUBW|Packed Horizontal Subtract|phsubw.phsubd
PINSRB|Insert Byte/Dword/Qword|pinsrb.pinsrd.pinsrq
PINSRD|Insert Byte/Dword/Qword|pinsrb.pinsrd.pinsrq
PINSRQ|Insert Byte/Dword/Qword|pinsrb.pinsrd.pinsrq
PINSRW|Insert Word|pinsrw
PMADDUBSW|Multiply and Add Packed Signed and Unsigned Bytes|pmaddubsw
PMADDWD|Multiply and Add Packed Integers|pmaddwd
PMAXSB|Maximum of Packed Signed Integers|pmaxsb.pmaxsw.pmaxsd.pmaxsq
PMAXSD|Maximum of Packed Signed Integers|pmaxsb.pmaxsw.pmaxsd.pmaxsq
PMAXSQ|Maximum of Packed Signed Integers|pmaxsb.pmaxsw.pmaxsd.pmaxsq
PMAXSW|Maximum of Packed Signed Integers|pmaxsb.pmaxsw.pmaxsd.pmaxsq
PMAXUB|Maximum of Packed Unsigned Integers|pmaxub.pmaxuw
PMAXUD|Maximum of Packed Unsigned Integers|pmaxud.pmaxuq
PMAXUQ|Maximum of Packed Unsigned Integers|pmaxud.pmaxuq
PMAXUW|Maximum of Packed Unsigned Integers|pmaxub.pmaxuw
PMINSB|Minimum of Packed Signed Integers|pminsb.pminsw
PMINSD|Minimum of Packed Signed Integers|pminsd.pminsq
PMINSQ|Minimum of Packed Signed Integers|pminsd.pminsq
PMINSW|Minimum of Packed Signed Integers|pminsb.pminsw
PMINUB|Minimum of Packed Unsigned Integers|pminub.pminuw
PMINUD|Minimum of Packed Unsigned Integers|pminud.pminuq
PMINUQ|Minimum of Packed Unsigned Integers|pminud.pminuq
PMINUW|Minimum of Packed Unsigned Integers|pminub.pminuw
PMOVMSKB|Move Byte Mask|pmovmskb
PMOVSX|Packed Move With Sign Extend|pmovsx
PMOVZX|Packed Move With Zero Extend|pmovzx
PMULDQ|Multiply Packed Doubleword Integers|pmuldq
PMULHRSW|Packed Multiply High With Round and Scale|pmulhrsw
PMULHUW|Multiply Packed Unsigned Integers and Store High Result|pmulhuw
PMULHW|Multiply Packed Signed Integers and Store High Result|pmulhw
PMULLD|Multiply Packed Integers and Store Low Result|pmulld.pmullq
PMULLQ|Multiply Packed Integers and Store Low Result|pmulld.pmullq
PMULLW|Multiply Packed Signed Integers and Store Low Result|pmullw
PMULUDQ|Multiply Packed Unsigned Doubleword Integers|pmuludq
POP|Pop a Value From the Stack|pop
POPA|Pop All General-Purpose Registers|popa.popad
POPAD|Pop All General-Purpose Registers|popa.popad
POPCNT|Return the Count of Number of Bits Set to 1|popcnt
POPF|Pop Stack Into EFLAGS Register|popf.popfd.popfq
POPFD|Pop Stack Into EFLAGS Register|popf.popfd.popfq
POPFQ|Pop Stack Into EFLAGS Register|popf.popfd.popfq
POR|Bitwise Logical OR|por
PREFETCHW|Prefetch Data Into Caches in Anticipation of a Write|prefetchw
PREFETCHh|Prefetch Data Into Caches|prefetchh
PSADBW|Compute Sum of Absolute Differences|psadbw
PSHUFB|Packed Shuffle Bytes|pshufb
PSHUFD|Shuffle Packed Doublewords|pshufd
PSHUFHW|Shuffle Packed High Words|pshufhw
PSHUFLW|Shuffle Packed Low Words|pshuflw
PSHUFW|Shuffle Packed Words|pshufw
PSIGNB|Packed SIGN|psignb.psignw.psignd
PSIGND|Packed SIGN|psignb.psignw.psignd
PSIGNW|Packed SIGN|psignb.psignw.psignd
PSLLD|Shift Packed Data Left Logical|psllw.pslld.psllq
PSLLDQ|Shift Double Quadword Left Logical|pslldq
PSLLQ|Shift Packed Data Left Logical|psllw.pslld.psllq
PSLLW|Shift Packed Data Left Logical|psllw.pslld.psllq
PSRAD|Shift Packed Data Right Arithmetic|psraw.psrad.psraq
PSRAQ|Shift Packed Data Right Arithmetic|psraw.psrad.psraq
PSRAW|Shift Packed Data Right Arithmetic|psraw.psrad.psraq
PSRLD|Shift Packed Data Right Logical|psrlw.psrld.psrlq
PSRLDQ|Shift Double Quadword Right Logical|psrldq
PSRLQ|Shift Packed Data Right Logical|psrlw.psrld.psrlq
PSRLW|Shift Packed Data Right Logical|psrlw.psrld.psrlq
PSUBB|Subtract Packed Integers|psubb.psubw.psubd
PSUBD|Subtract Packed Integers|psubb.psubw.psubd
PSUBQ|Subtract Packed Quadword Integers|psubq
PSUBSB|Subtract Packed Signed Integers With Signed Saturation|psubsb.psubsw
PSUBSW|Subtract Packed Signed Integers With Signed Saturation|psubsb.psubsw
PSUBUSB|Subtract Packed Unsigned Integers With Unsigned Saturation|psubusb.psubusw
PSUBUSW|Subtract Packed Unsigned Integers With Unsigned Saturation|psubusb.psubusw
PSUBW|Subtract Packed Integers|psubb.psubw.psubd
PTEST|Logical Compare|ptest
PTWRITE|Write Data to a Processor Trace Packet|ptwrite
PUNPCKHBW|Unpack High Data|punpckhbw.punpckhwd.punpckhdq.punpckhqdq
PUNPCKHDQ|Unpack High Data|punpckhbw.punpckhwd.punpckhdq.punpckhqdq
PUNPCKHQDQ|Unpack High Data|punpckhbw.punpckhwd.punpckhdq.punpckhqdq
PUNPCKHWD|Unpack High Data|punpckhbw.punpckhwd.punpckhdq.punpckhqdq
PUNPCKLBW|Unpack Low Data|punpcklbw.punpcklwd.punpckldq.punpcklqdq
PUNPCKLDQ|Unpack Low Data|punpcklbw.punpcklwd.punpckldq.punpcklqdq
PUNPCKLQDQ|Unpack Low Data|punpcklbw.punpcklwd.punpckldq.punpcklqdq
PUNPCKLWD|Unpack Low Data|punpcklbw.punpcklwd.punpckldq.punpcklqdq
PUSH|Push Word, Doubleword, or Quadword Onto the Stack|push
PUSHA|Push All General-Purpose Registers|pusha.pushad
PUSHAD|Push All General-Purpose Registers|pusha.pushad
PUSHF|Push EFLAGS Register Onto the Stack|pushf.pushfd.pushfq
PUSHFD|Push EFLAGS Register Onto the Stack|pushf.pushfd.pushfq
PUSHFQ|Push EFLAGS Register Onto the Stack|pushf.pushfd.pushfq
PXOR|Logical Exclusive OR|pxor
RCL|Rotate|rcl.rcr.rol.ror
RCPPS|Compute Reciprocals of Packed Single Precision Floating-Point Values|rcpps
RCPSS|Compute Reciprocal of Scalar Single Precision Floating-Point Values|rcpss
RCR|Rotate|rcl.rcr.rol.ror
RDFSBASE|Read FS/GS Segment Base|rdfsbase.rdgsbase
RDGSBASE|Read FS/GS Segment Base|rdfsbase.rdgsbase
RDMSR|Read From Model Specific Register|rdmsr
RDPID|Read Processor ID|rdpid
RDPKRU|Read Protection Key Rights for User Pages|rdpkru
RDPMC|Read Performance-Monitoring Counters|rdpmc
RDRAND|Read Random Number|rdrand
RDSEED|Read Random SEED|rdseed
RDSSPD|Read Shadow Stack Pointer|rdsspd.rdsspq
RDSSPQ|Read Shadow Stack Pointer|rdsspd.rdsspq
RDTSC|Read Time-Stamp Counter|rdtsc
RDTSCP|Read Time-Stamp Counter and Processor ID|rdtscp
REP|Repeat String Operation Prefix|rep.repe.repz.repne.repnz
REPE|Repeat String Operation Prefix|rep.repe.repz.repne.repnz
REPNE|Repeat String Operation Prefix|rep.repe.repz.repne.repnz
REPNZ|Repeat String Operation Prefix|rep.repe.repz.repne.repnz
REPZ|Repeat String Operation Prefix|rep.repe.repz.repne.repnz
RET|Return From Procedure|ret
ROL|Rotate|rcl.rcr.rol.ror
ROR|Rotate|rcl.rcr.rol.ror
RORX|Rotate Right Logical Without Affecting Flags|rorx
ROUNDPD|Round Packed Double Precision Floating-Point Values|roundpd
ROUNDPS|Round Packed Single Precision Floating-Point Values|roundps
ROUNDSD|Round Scalar Double Precision Floating-Point Values|roundsd
ROUNDSS|Round Scalar Single Precision Floating-Point Values|roundss
RSM|Resume From System Management Mode|rsm
RSQRTPS|Compute Reciprocals of Square Roots of Packed Single Precision Floating-PointValues|rsqrtps
RSQRTSS|Compute Reciprocal of Square Root of Scalar Single Precision Floating-Point Value|rsqrtss
RSTORSSP|Restore Saved Shadow Stack Pointer|rstorssp
SAHF|Store AH Into Flags|sahf
SAL|Shift|sal.sar.shl.shr
SAR|Shift|sal.sar.shl.shr
SARX|Shift Without Affecting Flags|sarx.shlx.shrx
SAVEPREVSSP|Save Previous Shadow Stack Pointer|saveprevssp
SBB|Integer Subtraction With Borrow|sbb
SCAS|Scan String|scas.scasb.scasw.scasd
SCASB|Scan String|scas.scasb.scasw.scasd
SCASD|Scan String|scas.scasb.scasw.scasd
SCASW|Scan String|scas.scasb.scasw.scasd
SENDUIPI|Send User Interprocessor Interrupt|senduipi
SERIALIZE|Serialize Instruction Execution|serialize
SETSSBSY|Mark Shadow Stack Busy|setssbsy
SETcc|Set Byte on Condition|setcc
SFENCE|Store Fence|sfence
SGDT|Store Global Descriptor Table Register|sgdt
SHA1MSG1|Perform an Intermediate Calculation for the Next Four SHA1 Message Dwords|sha1msg1
SHA1MSG2|Perform a Final Calculation for the Next Four SHA1 Message Dwords|sha1msg2
SHA1NEXTE|Calculate SHA1 State Variable E After Four Rounds|sha1nexte
SHA1RNDS4|Perform Four Rounds of SHA1 Operation|sha1rnds4
SHA256MSG1|Perform an Intermediate Calculation for the Next Four SHA256 MessageDwords|sha256msg1
SHA256MSG2|Perform a Final Calculation for the Next Four SHA256 Message Dwords|sha256msg2
SHA256RNDS2|Perform Two Rounds of SHA256 Operation|sha256rnds2
SHL|Shift|sal.sar.shl.shr
SHLD|Double Precision Shift Left|shld
SHLX|Shift Without Affecting Flags|sarx.shlx.shrx
SHR|Shift|sal.sar.shl.shr
SHRD|Double Precision Shift Right|shrd
SHRX|Shift Without Affecting Flags|sarx.shlx.shrx
SHUFPD|Packed Interleave Shuffle of Pairs of Double Precision Floating-Point Values|shufpd
SHUFPS|Packed Interleave Shuffle of Quadruplets of Single Precision Floating-Point Values|shufps
SIDT|Store Interrupt Descriptor Table Register|sidt
SLDT|Store Local Descriptor Table Register|sldt
SMSW|Store Machine Status Word|smsw
SQRTPD|Square Root of Double Precision Floating-Point Values|sqrtpd
SQRTPS|Square Root of Single Precision Floating-Point Values|sqrtps
SQRTSD|Compute Square Root of Scalar Double Precision Floating-Point Value|sqrtsd
SQRTSS|Compute Square Root of Scalar Single Precision Value|sqrtss
STAC|Set AC Flag in EFLAGS Register|stac
STC|Set Carry Flag|stc
STD|Set Direction Flag|std
STI|Set Interrupt Flag|sti
STMXCSR|Store MXCSR Register State|stmxcsr
STOS|Store String|stos.stosb.stosw.stosd.stosq
STOSB|Store String|stos.stosb.stosw.stosd.stosq
STOSD|Store String|stos.stosb.stosw.stosd.stosq
STOSQ|Store String|stos.stosb.stosw.stosd.stosq
STOSW|Store String|stos.stosb.stosw.stosd.stosq
STR|Store Task Register|str
STTILECFG|Store Tile Configuration|sttilecfg
STUI|Set User Interrupt Flag|stui
SUB|Subtract|sub
SUBPD|Subtract Packed Double Precision Floating-Point Values|subpd
SUBPS|Subtract Packed Single Precision Floating-Point Values|subps
SUBSD|Subtract Scalar Double Precision Floating-Point Value|subsd
SUBSS|Subtract Scalar Single Precision Floating-Point Value|subss
SWAPGS|Swap GS Base Register|swapgs
SYSCALL|Fast System Call|syscall
SYSENTER|Fast System Call|sysenter
SYSEXIT|Fast Return from Fast System Call|sysexit
SYSRET|Return From Fast System Call|sysret
TDPBF16PS|Dot Product of BF16 Tiles Accumulated into Packed Single Precision Tile|tdpbf16ps
TDPBSSD|Dot Product of Signed/Unsigned Bytes with DwordAccumulation|tdpbssd.tdpbsud.tdpbusd.tdpbuud
TDPBSUD|Dot Product of Signed/Unsigned Bytes with DwordAccumulation|tdpbssd.tdpbsud.tdpbusd.tdpbuud
TDPBUSD|Dot Product of Signed/Unsigned Bytes with DwordAccumulation|tdpbssd.tdpbsud.tdpbusd.tdpbuud
TDPBUUD|Dot Product of Signed/Unsigned Bytes with DwordAccumulation|tdpbssd.tdpbsud.tdpbusd.tdpbuud
TEST|Logical Compare|test
TESTUI|Determine User Interrupt Flag|testui
TILELOADD|Load Tile|tileloadd.tileloaddt1
TILELOADDT1|Load Tile|tileloadd.tileloaddt1
TILERELEASE|Release Tile|tilerelease
TILESTORED|Store Tile|tilestored
TILEZERO|Zero Tile|tilezero
TPAUSE|Timed PAUSE|tpause
TZCNT|Count the Number of Trailing Zero Bits|tzcnt
UCOMISD|Unordered Compare Scalar Double Precision Floating-Point Values and Set EFLAGS|ucomisd
UCOMISS|Unordered Compare Scalar Single Precision Floating-Point Values and Set EFLAGS|ucomiss
UD|Undefined Instruction|ud
UIRET|User-Interrupt Return|uiret
UMONITOR|User Level Set Up Monitor Address|umonitor
UMWAIT|User Level Monitor Wait|umwait
UNPCKHPD|Unpack and Interleave High Packed Double Precision Floating-Point Values|unpckhpd
UNPCKHPS|Unpack and Interleave High Packed Single Precision Floating-Point Values|unpckhps
UNPCKLPD|Unpack and Interleave Low Packed Double Precision Floating-Point Values|unpcklpd
UNPCKLPS|Unpack and Interleave Low Packed Single Precision Floating-Point Values|unpcklps
VADDPH|Add Packed FP16 Values|vaddph
VADDSH|Add Scalar FP16 Values|vaddsh
VALIGND|Align Doubleword/Quadword Vectors|valignd.valignq
VALIGNQ|Align Doubleword/Quadword Vectors|valignd.valignq
VBLENDMPD|Blend Float64/Float32 Vectors Using an OpMask Control|vblendmpd.vblendmps
VBLENDMPS|Blend Float64/Float32 Vectors Using an OpMask Control|vblendmpd.vblendmps
VBROADCAST|Load with Broadcast Floating-Point Data|vbroadcast
VCMPPH|Compare Packed FP16 Values|vcmpph
VCMPSH|Compare Scalar FP16 Values|vcmpsh
VCOMISH|Compare Scalar Ordered FP16 Values and Set EFLAGS|vcomish
VCOMPRESSPD|Store Sparse Packed Double Precision Floating-Point Values Into DenseMemory|vcompresspd
VCOMPRESSPS|Store Sparse Packed Single Precision Floating-Point Values Into Dense Memory|vcompressps
VCOMPRESSW|Store Sparse Packed Byte/Word Integer Values Into DenseMemory/Register|vpcompressb.vcompressw
VCVTDQ2PH|Convert Packed Signed Doubleword Integers to Packed FP16 Values|vcvtdq2ph
VCVTNE2PS2BF16|Convert Two Packed Single Data to One Packed BF16 Data|vcvtne2ps2bf16
VCVTNEPS2BF16|Convert Packed Single Data to Packed BF16 Data|vcvtneps2bf16
VCVTPD2PH|Convert Packed Double Precision FP Values to Packed FP16 Values|vcvtpd2ph
VCVTPD2QQ|Convert Packed Double Precision Floating-Point Values to Packed QuadwordIntegers|vcvtpd2qq
VCVTPD2UDQ|Convert Packed Double Precision Floating-Point Values to Packed UnsignedDoubleword Integers|vcvtpd2udq
VCVTPD2UQQ|Convert Packed Double Precision Floating-Point Values to Packed UnsignedQuadword Integers|vcvtpd2uqq
VCVTPH2DQ|Convert Packed FP16 Values to Signed Doubleword Integers|vcvtph2dq
VCVTPH2PD|Convert Packed FP16 Values to FP64 Values|vcvtph2pd
VCVTPH2PS|Convert Packed FP16 Values to Single Precision Floating-PointValues|vcvtph2ps.vcvtph2psx
VCVTPH2PSX|Convert Packed FP16 Values to Single Precision Floating-PointValues|vcvtph2ps.vcvtph2psx
VCVTPH2QQ|Convert Packed FP16 Values to Signed Quadword Integer Values|vcvtph2qq
VCVTPH2UDQ|Convert Packed FP16 Values to Unsigned Doubleword Integers|vcvtph2udq
VCVTPH2UQQ|Convert Packed FP16 Values to Unsigned Quadword Integers|vcvtph2uqq
VCVTPH2UW|Convert Packed FP16 Values to Unsigned Word Integers|vcvtph2uw
VCVTPH2W|Convert Packed FP16 Values to Signed Word Integers|vcvtph2w
VCVTPS2PH|Convert Single-Precision FP Value to 16-bit FP Value|vcvtps2ph
VCVTPS2PHX|Convert Packed Single Precision Floating-Point Values to Packed FP16 Values|vcvtps2phx
VCVTPS2QQ|Convert Packed Single Precision Floating-Point Values to Packed SignedQuadword Integer Values|vcvtps2qq
VCVTPS2UDQ|Convert Packed Single Precision Floating-Point Values to Packed UnsignedDoubleword Integer Values|vcvtps2udq
VCVTPS2UQQ|Convert Packed Single Precision Floating-Point Values to Packed UnsignedQuadword Integer Values|vcvtps2uqq
VCVTQQ2PD|Convert Packed Quadword Integers to Packed Double Precision Floating-PointValues|vcvtqq2pd
VCVTQQ2PH|Convert Packed Signed Quadword Integers to Packed FP16 Values|vcvtqq2ph
VCVTQQ2PS|Convert Packed Quadword Integers to Packed Single Precision Floating-PointValues|vcvtqq2ps
VCVTSD2SH|Convert Low FP64 Value to an FP16 Value|vcvtsd2sh
VCVTSD2USI|Convert Scalar Double Precision Floating-Point Value to Unsigned DoublewordInteger|vcvtsd2usi
VCVTSH2SD|Convert Low FP16 Value to an FP64 Value|vcvtsh2sd
VCVTSH2SI|Convert Low FP16 Value to Signed Integer|vcvtsh2si
VCVTSH2SS|Convert Low FP16 Value to FP32 Value|vcvtsh2ss
VCVTSH2USI|Convert Low FP16 Value to Unsigned Integer|vcvtsh2usi
VCVTSI2SH|Convert a Signed Doubleword/Quadword Integer to an FP16 Value|vcvtsi2sh
VCVTSS2SH|Convert Low FP32 Value to an FP16 Value|vcvtss2sh
VCVTSS2USI|Convert Scalar Single Precision Floating-Point Value to Unsigned DoublewordInteger|vcvtss2usi
VCVTTPD2QQ|Convert With Truncation Packed Double Precision Floating-Point Values toPacked Quadword Integers|vcvttpd2qq
VCVTTPD2UDQ|Convert With Truncation Packed Double Precision Floating-Point Values toPacked Unsigned Doubleword Integers|vcvttpd2udq
VCVTTPD2UQQ|Convert With Truncation Packed Double Precision Floating-Point Values toPacked Unsigned Quadword Integers|vcvttpd2uqq
VCVTTPH2DQ|Convert with Truncation Packed FP16 Values to Signed Doubleword Integers|vcvttph2dq
VCVTTPH2QQ|Convert with Truncation Packed FP16 Values to Signed Quadword Integers|vcvttph2qq
VCVTTPH2UDQ|Convert with Truncation Packed FP16 Values to Unsigned DoublewordIntegers|vcvttph2udq
VCVTTPH2UQQ|Convert with Truncation Packed FP16 Values to Unsigned Quadword Integers|vcvttph2uqq
VCVTTPH2UW|Convert Packed FP16 Values to Unsigned Word Integers|vcvttph2uw
VCVTTPH2W|Convert Packed FP16 Values to Signed Word Integers|vcvttph2w
VCVTTPS2QQ|Convert With Truncation Packed Single Precision Floating-Point Values toPacked Signed Quadword Integer Values|vcvttps2qq
VCVTTPS2UDQ|Convert With Truncation Packed Single Precision Floating-Point Values toPacked Unsigned Doubleword Integer Values|vcvttps2udq
VCVTTPS2UQQ|Convert With Truncation Packed Single Precision Floating-Point Values toPacked Unsigned Quadword Integer Values|vcvttps2uqq
VCVTTSD2USI|Convert With Truncation Scalar Double Precision Floating-Point Value toUnsigned Integer|vcvttsd2usi
VCVTTSH2SI|Convert with Truncation Low FP16 Value to a Signed Integer|vcvttsh2si
VCVTTSH2USI|Convert with Truncation Low FP16 Value to an Unsigned Integer|vcvttsh2usi
VCVTTSS2USI|Convert With Truncation Scalar Single Precision Floating-Point Value toUnsigned Integer|vcvttss2usi
VCVTUDQ2PD|Convert Packed Unsigned Doubleword Integers to Packed Double PrecisionFloating-Point Values|vcvtudq2pd
VCVTUDQ2PH|Convert Packed Unsigned Doubleword Integers to Packed FP16 Values|vcvtudq2ph
VCVTUDQ2PS|Convert Packed Unsigned Doubleword Integers to Packed Single PrecisionFloating-Point Values|vcvtudq2ps
VCVTUQQ2PD|Convert Packed Unsigned Quadword Integers to Packed Double PrecisionFloating-Point Values|vcvtuqq2pd
VCVTUQQ2PH|Convert Packed Unsigned Quadword Integers to Packed FP16 Values|vcvtuqq2ph
VCVTUQQ2PS|Convert Packed Unsigned Quadword Integers to Packed Single PrecisionFloating-Point Values|vcvtuqq2ps
VCVTUSI2SD|Convert Unsigned Integer to Scalar Double Precision Floating-Point Value|vcvtusi2sd
VCVTUSI2SH|Convert Unsigned Doubleword Integer to an FP16 Value|vcvtusi2sh
VCVTUSI2SS|Convert Unsigned Integer to Scalar Single Precision Floating-Point Value|vcvtusi2ss
VCVTUW2PH|Convert Packed Unsigned Word Integers to FP16 Values|vcvtuw2ph
VCVTW2PH|Convert Packed Signed Word Integers to FP16 Values|vcvtw2ph
VDBPSADBW|Double Block Packed Sum-Absolute-Differences (SAD) on Unsigned Bytes|vdbpsadbw
VDIVPH|Divide Packed FP16 Values|vdivph
VDIVSH|Divide Scalar FP16 Values|vdivsh
VDPBF16PS|Dot Product of BF16 Pairs Accumulated Into Packed Single Precision|vdpbf16ps
VERR|Verify a Segment for Reading or Writing|verr.verw
VERW|Verify a Segment for Reading or Writing|verr.verw
VEXPANDPD|Load Sparse Packed Double Precision Floating-Point Values From Dense Memory|vexpandpd
VEXPANDPS|Load Sparse Packed Single Precision Floating-Point Values From Dense Memory|vexpandps
VEXTRACTF128|Extract Packed Floating-Point Values|vextractf128.vextractf32x4.vextractf64x2.vextractf32x8.vextractf64x4
VEXTRACTF32x4|Extract Packed Floating-Point Values|vextractf128.vextractf32x4.vextractf64x2.vextractf32x8.vextractf64x4
VEXTRACTF32x8|Extract Packed Floating-Point Values|vextractf128.vextractf32x4.vextractf64x2.vextractf32x8.vextractf64x4
VEXTRACTF64x2|Extract Packed Floating-Point Values|vextractf128.vextractf32x4.vextractf64x2.vextractf32x8.vextractf64x4
VEXTRACTF64x4|Extract Packed Floating-Point Values|vextractf128.vextractf32x4.vextractf64x2.vextractf32x8.vextractf64x4
VEXTRACTI128|ExtractPacked Integer Values|vextracti128.vextracti32x4.vextracti64x2.vextracti32x8.vextracti64x4
VEXTRACTI32x4|ExtractPacked Integer Values|vextracti128.vextracti32x4.vextracti64x2.vextracti32x8.vextracti64x4
VEXTRACTI32x8|ExtractPacked Integer Values|vextracti128.vextracti32x4.vextracti64x2.vextracti32x8.vextracti64x4
VEXTRACTI64x2|ExtractPacked Integer Values|vextracti128.vextracti32x4.vextracti64x2.vextracti32x8.vextracti64x4
VEXTRACTI64x4|ExtractPacked Integer Values|vextracti128.vextracti32x4.vextracti64x2.vextracti32x8.vextracti64x4
VFCMADDCPH|Complex Multiply and Accumulate FP16 Values|vfcmaddcph.vfmaddcph
VFCMADDCSH|Complex Multiply and Accumulate Scalar FP16 Values|vfcmaddcsh.vfmaddcsh
VFCMULCPH|Complex Multiply FP16 Values|vfcmulcph.vfmulcph
VFCMULCSH|Complex Multiply Scalar FP16 Values|vfcmulcsh.vfmulcsh
VFIXUPIMMPD|Fix Up Special Packed Float64 Values|vfixupimmpd
VFIXUPIMMPS|Fix Up Special Packed Float32 Values|vfixupimmps
VFIXUPIMMSD|Fix Up Special Scalar Float64 Value|vfixupimmsd
VFIXUPIMMSS|Fix Up Special Scalar Float32 Value|vfixupimmss
VFMADD132PD|Fused Multiply-Add of Packed DoublePrecision Floating-Point Values|vfmadd132pd.vfmadd213pd.vfmadd231pd
VFMADD132PH|Fused Multiply-Add of Packed FP16 Values|vfmadd132ph.vfnmadd132ph.vfmadd213ph.vfnmadd213ph.vfmadd231ph.vfnmadd231ph
VFMADD132PS|Fused Multiply-Add of Packed SinglePrecision Floating-Point Values|vfmadd132ps.vfmadd213ps.vfmadd231ps
VFMADD132SD|Fused Multiply-Add of Scalar DoublePrecision Floating-Point Values|vfmadd132sd.vfmadd213sd.vfmadd231sd
VFMADD132SH|Fused Multiply-Add of Scalar FP16 Values|vfmadd132sh.vfnmadd132sh.vfmadd213sh.vfnmadd213sh.vfmadd231sh.vfnmadd231sh
VFMADD132SS|Fused Multiply-Add of Scalar Single PrecisionFloating-Point Values|vfmadd132ss.vfmadd213ss.vfmadd231ss
VFMADD213PD|Fused Multiply-Add of Packed DoublePrecision Floating-Point Values|vfmadd132pd.vfmadd213pd.vfmadd231pd
VFMADD213PH|Fused Multiply-Add of Packed FP16 Values|vfmadd132ph.vfnmadd132ph.vfmadd213ph.vfnmadd213ph.vfmadd231ph.vfnmadd231ph
VFMADD213PS|Fused Multiply-Add of Packed SinglePrecision Floating-Point Values|vfmadd132ps.vfmadd213ps.vfmadd231ps
VFMADD213SD|Fused Multiply-Add of Scalar DoublePrecision Floating-Point Values|vfmadd132sd.vfmadd213sd.vfmadd231sd
VFMADD213SH|Fused Multiply-Add of Scalar FP16 Values|vfmadd132sh.vfnmadd132sh.vfmadd213sh.vfnmadd213sh.vfmadd231sh.vfnmadd231sh
VFMADD213SS|Fused Multiply-Add of Scalar Single PrecisionFloating-Point Values|vfmadd132ss.vfmadd213ss.vfmadd231ss
VFMADD231PD|Fused Multiply-Add of Packed DoublePrecision Floating-Point Values|vfmadd132pd.vfmadd213pd.vfmadd231pd
VFMADD231PH|Fused Multiply-Add of Packed FP16 Values|vfmadd132ph.vfnmadd132ph.vfmadd213ph.vfnmadd213ph.vfmadd231ph.vfnmadd231ph
VFMADD231PS|Fused Multiply-Add of Packed SinglePrecision Floating-Point Values|vfmadd132ps.vfmadd213ps.vfmadd231ps
VFMADD231SD|Fused Multiply-Add of Scalar DoublePrecision Floating-Point Values|vfmadd132sd.vfmadd213sd.vfmadd231sd
VFMADD231SH|Fused Multiply-Add of Scalar FP16 Values|vfmadd132sh.vfnmadd132sh.vfmadd213sh.vfnmadd213sh.vfmadd231sh.vfnmadd231sh
VFMADD231SS|Fused Multiply-Add of Scalar Single PrecisionFloating-Point Values|vfmadd132ss.vfmadd213ss.vfmadd231ss
VFMADDCPH|Complex Multiply and Accumulate FP16 Values|vfcmaddcph.vfmaddcph
VFMADDCSH|Complex Multiply and Accumulate Scalar FP16 Values|vfcmaddcsh.vfmaddcsh
VFMADDRND231PD|Fused Multiply-Add of Packed Double-Precision Floating-Point Valueswith rounding control|vfmaddrnd231pd
VFMADDSUB132PD|Fused Multiply-AlternatingAdd/Subtract of Packed Double Precision Floating-Point Values|vfmaddsub132pd.vfmaddsub213pd.vfmaddsub231pd
VFMADDSUB132PH|Fused Multiply-AlternatingAdd/Subtract of Packed FP16 Values|vfmaddsub132ph.vfmaddsub213ph.vfmaddsub231ph
VFMADDSUB132PS|Fused Multiply-AlternatingAdd/Subtract of Packed Single Precision Floating-Point Values|vfmaddsub132ps.vfmaddsub213ps.vfmaddsub231ps
VFMADDSUB213PD|Fused Multiply-AlternatingAdd/Subtract of Packed Double Precision Floating-Point Values|vfmaddsub132pd.vfmaddsub213pd.vfmaddsub231pd
VFMADDSUB213PH|Fused Multiply-AlternatingAdd/Subtract of Packed FP16 Values|vfmaddsub132ph.vfmaddsub213ph.vfmaddsub231ph
VFMADDSUB213PS|Fused Multiply-AlternatingAdd/Subtract of Packed Single Precision Floating-Point Values|vfmaddsub132ps.vfmaddsub213ps.vfmaddsub231ps
VFMADDSUB231PD|Fused Multiply-AlternatingAdd/Subtract of Packed Double Precision Floating-Point Values|vfmaddsub132pd.vfmaddsub213pd.vfmaddsub231pd
VFMADDSUB231PH|Fused Multiply-AlternatingAdd/Subtract of Packed FP16 Values|vfmaddsub132ph.vfmaddsub213ph.vfmaddsub231ph
VFMADDSUB231PS|Fused Multiply-AlternatingAdd/Subtract of Packed Single Precision Floating-Point Values|vfmaddsub132ps.vfmaddsub213ps.vfmaddsub231ps
VFMSUB132PD|Fused Multiply-Subtract of Packed DoublePrecision Floating-Point Values|vfmsub132pd.vfmsub213pd.vfmsub231pd
VFMSUB132PH|Fused Multiply-Subtract of Packed FP16 Values|vfmsub132ph.vfnmsub132ph.vfmsub213ph.vfnmsub213ph.vfmsub231ph.vfnmsub231ph
VFMSUB132PS|Fused Multiply-Subtract of Packed SinglePrecision Floating-Point Values|vfmsub132ps.vfmsub213ps.vfmsub231ps
VFMSUB132SD|Fused Multiply-Subtract of Scalar DoublePrecision Floating-Point Values|vfmsub132sd.vfmsub213sd.vfmsub231sd
VFMSUB132SH|Fused Multiply-Subtract of Scalar FP16 Values|vfmsub132sh.vfnmsub132sh.vfmsub213sh.vfnmsub213sh.vfmsub231sh.vfnmsub231sh
VFMSUB132SS|Fused Multiply-Subtract of Scalar SinglePrecision Floating-Point Values|vfmsub132ss.vfmsub213ss.vfmsub231ss
VFMSUB213PD|Fused Multiply-Subtract of Packed DoublePrecision Floating-Point Values|vfmsub132pd.vfmsub213pd.vfmsub231pd
VFMSUB213PH|Fused Multiply-Subtract of Packed FP16 Values|vfmsub132ph.vfnmsub132ph.vfmsub213ph.vfnmsub213ph.vfmsub231ph.vfnmsub231ph
VFMSUB213PS|Fused Multiply-Subtract of Packed SinglePrecision Floating-Point Values|vfmsub132ps.vfmsub213ps.vfmsub231ps
VFMSUB213SD|Fused Multiply-Subtract of Scalar DoublePrecision Floating-Point Values|vfmsub132sd.vfmsub213sd.vfmsub231sd
VFMSUB213SH|Fused Multiply-Subtract of Scalar FP16 Values|vfmsub132sh.vfnmsub132sh.vfmsub213sh.vfnmsub213sh.vfmsub231sh.vfnmsub231sh
VFMSUB213SS|Fused Multiply-Subtract of Scalar SinglePrecision Floating-Point Values|vfmsub132ss.vfmsub213ss.vfmsub231ss
VFMSUB231PD|Fused Multiply-Subtract of Packed DoublePrecision Floating-Point Values|vfmsub132pd.vfmsub213pd.vfmsub231pd
VFMSUB231PH|Fused Multiply-Subtract of Packed FP16 Values|vfmsub132ph.vfnmsub132ph.vfmsub213ph.vfnmsub213ph.vfmsub231ph.vfnmsub231ph
VFMSUB231PS|Fused Multiply-Subtract of Packed SinglePrecision Floating-Point Values|vfmsub132ps.vfmsub213ps.vfmsub231ps
VFMSUB231SD|Fused Multiply-Subtract of Scalar DoublePrecision Floating-Point Values|vfmsub132sd.vfmsub213sd.vfmsub231sd
VFMSUB231SH|Fused Multiply-Subtract of Scalar FP16 Values|vfmsub132sh.vfnmsub132sh.vfmsub213sh.vfnmsub213sh.vfmsub231sh.vfnmsub231sh
VFMSUB231SS|Fused Multiply-Subtract of Scalar SinglePrecision Floating-Point Values|vfmsub132ss.vfmsub213ss.vfmsub231ss
VFMSUBADD132PD|Fused Multiply-AlternatingSubtract/Add of Packed Double Precision Floating-Point Values|vfmsubadd132pd.vfmsubadd213pd.vfmsubadd231pd
VFMSUBADD132PH|Fused Multiply-AlternatingSubtract/Add of Packed FP16 Values|vfmsubadd132ph.vfmsubadd213ph.vfmsubadd231ph
VFMSUBADD132PS|Fused Multiply-AlternatingSubtract/Add of Packed Single Precision Floating-Point Values|vfmsubadd132ps.vfmsubadd213ps.vfmsubadd231ps
VFMSUBADD213PD|Fused Multiply-AlternatingSubtract/Add of Packed Double Precision Floating-Point Values|vfmsubadd132pd.vfmsubadd213pd.vfmsubadd231pd
VFMSUBADD213PH|Fused Multiply-AlternatingSubtract/Add of Packed FP16 Values|vfmsubadd132ph.vfmsubadd213ph.vfmsubadd231ph
VFMSUBADD213PS|Fused Multiply-AlternatingSubtract/Add of Packed Single Precision Floating-Point Values|vfmsubadd132ps.vfmsubadd213ps.vfmsubadd231ps
VFMSUBADD231PD|Fused Multiply-AlternatingSubtract/Add of Packed Double Precision Floating-Point Values|vfmsubadd132pd.vfmsubadd213pd.vfmsubadd231pd
VFMSUBADD231PH|Fused Multiply-AlternatingSubtract/Add of Packed FP16 Values|vfmsubadd132ph.vfmsubadd213ph.vfmsubadd231ph
VFMSUBADD231PS|Fused Multiply-AlternatingSubtract/Add of Packed Single Precision Floating-Point Values|vfmsubadd132ps.vfmsubadd213ps.vfmsubadd231ps
VFMULCPH|Complex Multiply FP16 Values|vfcmulcph.vfmulcph
VFMULCSH|Complex Multiply Scalar FP16 Values|vfcmulcsh.vfmulcsh
VFNMADD132PD|Fused Negative Multiply-Add of PackedDouble Precision Floating-Point Values|vfnmadd132pd.vfnmadd213pd.vfnmadd231pd
VFNMADD132PH|Fused Multiply-Add of Packed FP16 Values|vfmadd132ph.vfnmadd132ph.vfmadd213ph.vfnmadd213ph.vfmadd231ph.vfnmadd231ph
VFNMADD132PS|Fused Negative Multiply-Add of PackedSingle Precision Floating-Point Values|vfnmadd132ps.vfnmadd213ps.vfnmadd231ps
VFNMADD132SD|Fused Negative Multiply-Add of ScalarDouble Precision Floating-Point Values|vfnmadd132sd.vfnmadd213sd.vfnmadd231sd
VFNMADD132SH|Fused Multiply-Add of Scalar FP16 Values|vfmadd132sh.vfnmadd132sh.vfmadd213sh.vfnmadd213sh.vfmadd231sh.vfnmadd231sh
VFNMADD132SS|Fused Negative Multiply-Add of ScalarSingle Precision Floating-Point Values|vfnmadd132ss.vfnmadd213ss.vfnmadd231ss
VFNMADD213PD|Fused Negative Multiply-Add of PackedDouble Precision Floating-Point Values|vfnmadd132pd.vfnmadd213pd.vfnmadd231pd
VFNMADD213PH|Fused Multiply-Add of Packed FP16 Values|vfmadd132ph.vfnmadd132ph.vfmadd213ph.vfnmadd213ph.vfmadd231ph.vfnmadd231ph
VFNMADD213PS|Fused Negative Multiply-Add of PackedSingle Precision Floating-Point Values|vfnmadd132ps.vfnmadd213ps.vfnmadd231ps
VFNMADD213SD|Fused Negative Multiply-Add of ScalarDouble Precision Floating-Point Values|vfnmadd132sd.vfnmadd213sd.vfnmadd231sd
VFNMADD213SH|Fused Multiply-Add of Scalar FP16 Values|vfmadd132sh.vfnmadd132sh.vfmadd213sh.vfnmadd213sh.vfmadd231sh.vfnmadd231sh
VFNMADD213SS|Fused Negative Multiply-Add of ScalarSingle Precision Floating-Point Values|vfnmadd132ss.vfnmadd213ss.vfnmadd231ss
VFNMADD231PD|Fused Negative Multiply-Add of PackedDouble Precision Floating-Point Values|vfnmadd132pd.vfnmadd213pd.vfnmadd231pd
VFNMADD231PH|Fused Multiply-Add of Packed FP16 Values|vfmadd132ph.vfnmadd132ph.vfmadd213ph.vfnmadd213ph.vfmadd231ph.vfnmadd231ph
VFNMADD231PS|Fused Negative Multiply-Add of PackedSingle Precision Floating-Point Values|vfnmadd132ps.vfnmadd213ps.vfnmadd231ps
VFNMADD231SD|Fused Negative Multiply-Add of ScalarDouble Precision Floating-Point Values|vfnmadd132sd.vfnmadd213sd.vfnmadd231sd
VFNMADD231SH|Fused Multiply-Add of Scalar FP16 Values|vfmadd132sh.vfnmadd132sh.vfmadd213sh.vfnmadd213sh.vfmadd231sh.vfnmadd231sh
VFNMADD231SS|Fused Negative Multiply-Add of ScalarSingle Precision Floating-Point Values|vfnmadd132ss.vfnmadd213ss.vfnmadd231ss
VFNMSUB132PD|Fused Negative Multiply-Subtract ofPacked Double Precision Floating-Point Values|vfnmsub132pd.vfnmsub213pd.vfnmsub231pd
VFNMSUB132PH|Fused Multiply-Subtract of Packed FP16 Values|vfmsub132ph.vfnmsub132ph.vfmsub213ph.vfnmsub213ph.vfmsub231ph.vfnmsub231ph
VFNMSUB132PS|Fused Negative Multiply-Subtract ofPacked Single Precision Floating-Point Values|vfnmsub132ps.vfnmsub213ps.vfnmsub231ps
VFNMSUB132SD|Fused Negative Multiply-Subtract ofScalar Double Precision Floating-Point Values|vfnmsub132sd.vfnmsub213sd.vfnmsub231sd
VFNMSUB132SH|Fused Multiply-Subtract of Scalar FP16 Values|vfmsub132sh.vfnmsub132sh.vfmsub213sh.vfnmsub213sh.vfmsub231sh.vfnmsub231sh
VFNMSUB132SS|Fused Negative Multiply-Subtract ofScalar Single Precision Floating-Point Values|vfnmsub132ss.vfnmsub213ss.vfnmsub231ss
VFNMSUB213PD|Fused Negative Multiply-Subtract ofPacked Double Precision Floating-Point Values|vfnmsub132pd.vfnmsub213pd.vfnmsub231pd
VFNMSUB213PH|Fused Multiply-Subtract of Packed FP16 Values|vfmsub132ph.vfnmsub132ph.vfmsub213ph.vfnmsub213ph.vfmsub231ph.vfnmsub231ph
VFNMSUB213PS|Fused Negative Multiply-Subtract ofPacked Single Precision Floating-Point Values|vfnmsub132ps.vfnmsub213ps.vfnmsub231ps
VFNMSUB213SD|Fused Negative Multiply-Subtract ofScalar Double Precision Floating-Point Values|vfnmsub132sd.vfnmsub213sd.vfnmsub231sd
VFNMSUB213SH|Fused Multiply-Subtract of Scalar FP16 Values|vfmsub132sh.vfnmsub132sh.vfmsub213sh.vfnmsub213sh.vfmsub231sh.vfnmsub231sh
VFNMSUB213SS|Fused Negative Multiply-Subtract ofScalar Single Precision Floating-Point Values|vfnmsub132ss.vfnmsub213ss.vfnmsub231ss
VFNMSUB231PD|Fused Negative Multiply-Subtract ofPacked Double Precision Floating-Point Values|vfnmsub132pd.vfnmsub213pd.vfnmsub231pd
VFNMSUB231PH|Fused Multiply-Subtract of Packed FP16 Values|vfmsub132ph.vfnmsub132ph.vfmsub213ph.vfnmsub213ph.vfmsub231ph.vfnmsub231ph
VFNMSUB231PS|Fused Negative Multiply-Subtract ofPacked Single Precision Floating-Point Values|vfnmsub132ps.vfnmsub213ps.vfnmsub231ps
VFNMSUB231SD|Fused Negative Multiply-Subtract ofScalar Double Precision Floating-Point Values|vfnmsub132sd.vfnmsub213sd.vfnmsub231sd
VFNMSUB231SH|Fused Multiply-Subtract of Scalar FP16 Values|vfmsub132sh.vfnmsub132sh.vfmsub213sh.vfnmsub213sh.vfmsub231sh.vfnmsub231sh
VFNMSUB231SS|Fused Negative Multiply-Subtract ofScalar Single Precision Floating-Point Values|vfnmsub132ss.vfnmsub213ss.vfnmsub231ss
VFPCLASSPD|Tests Types of Packed Float64 Values|vfpclasspd
VFPCLASSPH|Test Types of Packed FP16 Values|vfpclassph
VFPCLASSPS|Tests Types of Packed Float32 Values|vfpclassps
VFPCLASSSD|Tests Type of a Scalar Float64 Value|vfpclasssd
VFPCLASSSH|Test Types of Scalar FP16 Values|vfpclasssh
VFPCLASSSS|Tests Type of a Scalar Float32 Value|vfpclassss
VGATHERDPD|Gather Packed Double Precision Floating-Point Values UsingSigned Dword/Qword Indices|vgatherdpd.vgatherqpd
VGATHERDPD|Gather Packed Single, Packed Double with Signed Dword Indices|vgatherdps.vgatherdpd
VGATHERDPS|Gather Packed Single Precision Floating-Point Values UsingSigned Dword/Qword Indices|vgatherdps.vgatherqps
VGATHERDPS|Gather Packed Single, Packed Double with Signed Dword Indices|vgatherdps.vgatherdpd
VGATHERQPD|Gather Packed Double Precision Floating-Point Values UsingSigned Dword/Qword Indices|vgatherdpd.vgatherqpd
VGATHERQPD|Gather Packed Single, Packed Double with Signed Qword Indices|vgatherqps.vgatherqpd
VGATHERQPS|Gather Packed Single Precision Floating-Point Values UsingSigned Dword/Qword Indices|vgatherdps.vgatherqps
VGATHERQPS|Gather Packed Single, Packed Double with Signed Qword Indices|vgatherqps.vgatherqpd
VGETEXPPD|Convert Exponents of Packed Double Precision Floating-Point Values to DoublePrecision Floating-Point Values|vgetexppd
VGETEXPPH|Convert Exponents of Packed FP16 Values to FP16 Values|vgetexpph
VGETEXPPS|Convert Exponents of Packed Single Precision Floating-Point Values to SinglePrecision Floating-Point Values|vgetexpps
VGETEXPSD|Convert Exponents of Scalar Double Precision Floating-Point Value to DoublePrecision Floating-Point Value|vgetexpsd
VGETEXPSH|Convert Exponents of Scalar FP16 Values to FP16 Values|vgetexpsh
VGETEXPSS|Convert Exponents of Scalar Single Precision Floating-Point Value to SinglePrecision Floating-Point Value|vgetexpss
VGETMANTPD|Extract Float64 Vector of Normalized Mantissas From Float64 Vector|vgetmantpd
VGETMANTPH|Extract FP16 Vector of Normalized Mantissas from FP16 Vector|vgetmantph
VGETMANTPS|Extract Float32 Vector of Normalized Mantissas From Float32 Vector|vgetmantps
VGETMANTSD|Extract Float64 of Normalized Mantissa From Float64 Scalar|vgetmantsd
VGETMANTSH|Extract FP16 of Normalized Mantissa from FP16 Scalar|vgetmantsh
VGETMANTSS|Extract Float32 Vector of Normalized Mantissa From Float32 Scalar|vgetmantss
VINSERTF128|Insert PackedFloating-Point Values|vinsertf128.vinsertf32x4.vinsertf64x2.vinsertf32x8.vinsertf64x4
VINSERTF32x4|Insert PackedFloating-Point Values|vinsertf128.vinsertf32x4.vinsertf64x2.vinsertf32x8.vinsertf64x4
VINSERTF32x8|Insert PackedFloating-Point Values|vinsertf128.vinsertf32x4.vinsertf64x2.vinsertf32x8.vinsertf64x4
VINSERTF64x2|Insert PackedFloating-Point Values|vinsertf128.vinsertf32x4.vinsertf64x2.vinsertf32x8.vinsertf64x4
VINSERTF64x4|Insert PackedFloating-Point Values|vinsertf128.vinsertf32x4.vinsertf64x2.vinsertf32x8.vinsertf64x4
VINSERTI128|Insert PackedInteger Values|vinserti128.vinserti32x4.vinserti64x2.vinserti32x8.vinserti64x4
VINSERTI32x4|Insert PackedInteger Values|vinserti128.vinserti32x4.vinserti64x2.vinserti32x8.vinserti64x4
VINSERTI32x8|Insert PackedInteger Values|vinserti128.vinserti32x4.vinserti64x2.vinserti32x8.vinserti64x4
VINSERTI64x2|Insert PackedInteger Values|vinserti128.vinserti32x4.vinserti64x2.vinserti32x8.vinserti64x4
VINSERTI64x4|Insert PackedInteger Values|vinserti128.vinserti32x4.vinserti64x2.vinserti32x8.vinserti64x4
VMASKMOV|Conditional SIMD Packed Loads and Stores|vmaskmov
VMAXPH|Return Maximum of Packed FP16 Values|vmaxph
VMAXSH|Return Maximum of Scalar FP16 Values|vmaxsh
VMINPH|Return Minimum of Packed FP16 Values|vminph
VMINSH|Return Minimum Scalar FP16 Value|vminsh
VMOVDQA32|Move Aligned Packed Integer Values|movdqa.vmovdqa32.vmovdqa64
VMOVDQA64|Move Aligned Packed Integer Values|movdqa.vmovdqa32.vmovdqa64
VMOVDQU16|Move Unaligned Packed Integer Values|movdqu.vmovdqu8.vmovdqu16.vmovdqu32.vmovdqu64
VMOVDQU32|Move Unaligned Packed Integer Values|movdqu.vmovdqu8.vmovdqu16.vmovdqu32.vmovdqu64
VMOVDQU64|Move Unaligned Packed Integer Values|movdqu.vmovdqu8.vmovdqu16.vmovdqu32.vmovdqu64
VMOVDQU8|Move Unaligned Packed Integer Values|movdqu.vmovdqu8.vmovdqu16.vmovdqu32.vmovdqu64
VMOVSH|Move Scalar FP16 Value|vmovsh
VMOVW|Move Word|vmovw
VMULPH|Multiply Packed FP16 Values|vmulph
VMULSH|Multiply Scalar FP16 Values|vmulsh
VP2INTERSECTD|Compute Intersection Between DWORDS/QUADWORDS to aPair of Mask Registers|vp2intersectd.vp2intersectq
VP2INTERSECTQ|Compute Intersection Between DWORDS/QUADWORDS to aPair of Mask Registers|vp2intersectd.vp2intersectq
VPBLENDD|Blend Packed Dwords|vpblendd
VPBLENDMB|Blend Byte/Word Vectors Using an Opmask Control|vpblendmb.vpblendmw
VPBLENDMD|Blend Int32/Int64 Vectors Using an OpMask Control|vpblendmd.vpblendmq
VPBLENDMQ|Blend Int32/Int64 Vectors Using an OpMask Control|vpblendmd.vpblendmq
VPBLENDMW|Blend Byte/Word Vectors Using an Opmask Control|vpblendmb.vpblendmw
VPBROADCAST|Load Integer and Broadcast|vpbroadcast
VPBROADCASTB|Load With Broadcast Integer Data From General Purpose Register|vpbroadcastb.vpbroadcastw.vpbroadcastd.vpbroadcastq
VPBROADCASTD|Load With Broadcast Integer Data From General Purpose Register|vpbroadcastb.vpbroadcastw.vpbroadcastd.vpbroadcastq
VPBROADCASTM|Broadcast Mask to Vector Register|vpbroadcastm
VPBROADCASTQ|Load With Broadcast Integer Data From General Purpose Register|vpbroadcastb.vpbroadcastw.vpbroadcastd.vpbroadcastq
VPBROADCASTW|Load With Broadcast Integer Data From General Purpose Register|vpbroadcastb.vpbroadcastw.vpbroadcastd.vpbroadcastq
VPCMPB|Compare Packed Byte Values Into Mask|vpcmpb.vpcmpub
VPCMPD|Compare Packed Integer Values Into Mask|vpcmpd.vpcmpud
VPCMPQ|Compare Packed Integer Values Into Mask|vpcmpq.vpcmpuq
VPCMPUB|Compare Packed Byte Values Into Mask|vpcmpb.vpcmpub
VPCMPUD|Compare Packed Integer Values Into Mask|vpcmpd.vpcmpud
VPCMPUQ|Compare Packed Integer Values Into Mask|vpcmpq.vpcmpuq
VPCMPUW|Compare Packed Word Values Into Mask|vpcmpw.vpcmpuw
VPCMPW|Compare Packed Word Values Into Mask|vpcmpw.vpcmpuw
VPCOMPRESSB|Store Sparse Packed Byte/Word Integer Values Into DenseMemory/Register|vpcompressb.vcompressw
VPCOMPRESSD|Store Sparse Packed Doubleword Integer Values Into Dense Memory/Register|vpcompressd
VPCOMPRESSQ|Store Sparse Packed Quadword Integer Values Into Dense Memory/Register|vpcompressq
VPCONFLICTD|Detect Conflicts Within a Vector of Packed Dword/Qword Values Into DenseMemory/ Register|vpconflictd.vpconflictq
VPCONFLICTQ|Detect Conflicts Within a Vector of Packed Dword/Qword Values Into DenseMemory/ Register|vpconflictd.vpconflictq
VPDPBUSD|Multiply and Add Unsigned and Signed Bytes|vpdpbusd
VPDPBUSDS|Multiply and Add Unsigned and Signed Bytes With Saturation|vpdpbusds
VPDPWSSD|Multiply and Add Signed Word Integers|vpdpwssd
VPDPWSSDS|Multiply and Add Signed Word Integers With Saturation|vpdpwssds
VPERM2F128|Permute Floating-Point Values|vperm2f128
VPERM2I128|Permute Integer Values|vperm2i128
VPERMB|Permute Packed Bytes Elements|vpermb
VPERMD|Permute Packed Doubleword/Word Elements|vpermd.vpermw
VPERMI2B|Full Permute of Bytes From Two Tables Overwriting the Index|vpermi2b
VPERMI2D|Full Permute From Two Tables Overwriting the Index|vpermi2w.vpermi2d.vpermi2q.vpermi2ps.vpermi2pd
VPERMI2PD|Full Permute From Two Tables Overwriting the Index|vpermi2w.vpermi2d.vpermi2q.vpermi2ps.vpermi2pd
VPERMI2PS|Full Permute From Two Tables Overwriting the Index|vpermi2w.vpermi2d.vpermi2q.vpermi2ps.vpermi2pd
VPERMI2Q|Full Permute From Two Tables Overwriting the Index|vpermi2w.vpermi2d.vpermi2q.vpermi2ps.vpermi2pd
VPERMI2W|Full Permute From Two Tables Overwriting the Index|vpermi2w.vpermi2d.vpermi2q.vpermi2ps.vpermi2pd
VPERMILPD|Permute In-Lane of Pairs of Double Precision Floating-Point Values|vpermilpd
VPERMILPS|Permute In-Lane of Quadruples of Single Precision Floating-Point Values|vpermilps
VPERMPD|Permute Double Precision Floating-Point Elements|vpermpd
VPERMPS|Permute Single Precision Floating-Point Elements|vpermps
VPERMQ|Qwords Element Permutation|vpermq
VPERMT2B|Full Permute of Bytes From Two Tables Overwriting a Table|vpermt2b
VPERMT2D|Full Permute From Two Tables Overwriting One Table|vpermt2w.vpermt2d.vpermt2q.vpermt2ps.vpermt2pd
VPERMT2PD|Full Permute From Two Tables Overwriting One Table|vpermt2w.vpermt2d.vpermt2q.vpermt2ps.vpermt2pd
VPERMT2PS|Full Permute From Two Tables Overwriting One Table|vpermt2w.vpermt2d.vpermt2q.vpermt2ps.vpermt2pd
VPERMT2Q|Full Permute From Two Tables Overwriting One Table|vpermt2w.vpermt2d.vpermt2q.vpermt2ps.vpermt2pd
VPERMT2W|Full Permute From Two Tables Overwriting One Table|vpermt2w.vpermt2d.vpermt2q.vpermt2ps.vpermt2pd
VPERMW|Permute Packed Doubleword/Word Elements|vpermd.vpermw
VPEXPANDB|Expand Byte/Word Values|vpexpandb.vpexpandw
VPEXPANDD|Load Sparse Packed Doubleword Integer Values From Dense Memory/Register|vpexpandd
VPEXPANDQ|Load Sparse Packed Quadword Integer Values From Dense Memory/Register|vpexpandq
VPEXPANDW|Expand Byte/Word Values|vpexpandb.vpexpandw
VPGATHERDD|Gather Packed Dword Values Using Signed Dword/Qword Indices|vpgatherdd.vpgatherqd
VPGATHERDD|Gather Packed Dword, Packed Qword With Signed Dword Indices|vpgatherdd.vpgatherdq
VPGATHERDQ|Gather Packed Dword, Packed Qword With Signed Dword Indices|vpgatherdd.vpgatherdq
VPGATHERDQ|Gather Packed Qword Values Using Signed Dword/Qword Indices|vpgatherdq.vpgatherqq
VPGATHERQD|Gather Packed Dword Values Using Signed Dword/Qword Indices|vpgatherdd.vpgatherqd
VPGATHERQD|Gather Packed Dword, Packed Qword with Signed Qword Indices|vpgatherqd.vpgatherqq
VPGATHERQQ|Gather Packed Qword Values Using Signed Dword/Qword Indices|vpgatherdq.vpgatherqq
VPGATHERQQ|Gather Packed Dword, Packed Qword with Signed Qword Indices|vpgatherqd.vpgatherqq
VPLZCNTD|Count the Number of Leading Zero Bits for Packed Dword, Packed Qword Values|vplzcntd.vplzcntq
VPLZCNTQ|Count the Number of Leading Zero Bits for Packed Dword, Packed Qword Values|vplzcntd.vplzcntq
VPMADD52HUQ|Packed Multiply of Unsigned 52-Bit Unsigned Integers and Add High 52-BitProducts to 64-Bit Accumulators|vpmadd52huq
VPMADD52LUQ|Packed Multiply of Unsigned 52-Bit Integers and Add the Low 52-Bit Productsto Qword Accumulators|vpmadd52luq
VPMASKMOV|Conditional SIMD Integer Packed Loads and Stores|vpmaskmov
VPMOVB2M|Convert a Vector Register to a Mask|vpmovb2m.vpmovw2m.vpmovd2m.vpmovq2m
VPMOVD2M|Convert a Vector Register to a Mask|vpmovb2m.vpmovw2m.vpmovd2m.vpmovq2m
VPMOVDB|Down Convert DWord to Byte|vpmovdb.vpmovsdb.vpmovusdb
VPMOVDW|Down Convert DWord to Word|vpmovdw.vpmovsdw.vpmovusdw
VPMOVM2B|Convert a Mask Register to a VectorRegister|vpmovm2b.vpmovm2w.vpmovm2d.vpmovm2q
VPMOVM2D|Convert a Mask Register to a VectorRegister|vpmovm2b.vpmovm2w.vpmovm2d.vpmovm2q
VPMOVM2Q|Convert a Mask Register to a VectorRegister|vpmovm2b.vpmovm2w.vpmovm2d.vpmovm2q
VPMOVM2W|Convert a Mask Register to a VectorRegister|vpmovm2b.vpmovm2w.vpmovm2d.vpmovm2q
VPMOVQ2M|Convert a Vector Register to a Mask|vpmovb2m.vpmovw2m.vpmovd2m.vpmovq2m
VPMOVQB|Down Convert QWord to Byte|vpmovqb.vpmovsqb.vpmovusqb
VPMOVQD|Down Convert QWord to DWord|vpmovqd.vpmovsqd.vpmovusqd
VPMOVQW|Down Convert QWord to Word|vpmovqw.vpmovsqw.vpmovusqw
VPMOVSDB|Down Convert DWord to Byte|vpmovdb.vpmovsdb.vpmovusdb
VPMOVSDW|Down Convert DWord to Word|vpmovdw.vpmovsdw.vpmovusdw
VPMOVSQB|Down Convert QWord to Byte|vpmovqb.vpmovsqb.vpmovusqb
VPMOVSQD|Down Convert QWord to DWord|vpmovqd.vpmovsqd.vpmovusqd
VPMOVSQW|Down Convert QWord to Word|vpmovqw.vpmovsqw.vpmovusqw
VPMOVSWB|Down Convert Word to Byte|vpmovwb.vpmovswb.vpmovuswb
VPMOVUSDB|Down Convert DWord to Byte|vpmovdb.vpmovsdb.vpmovusdb
VPMOVUSDW|Down Convert DWord to Word|vpmovdw.vpmovsdw.vpmovusdw
VPMOVUSQB|Down Convert QWord to Byte|vpmovqb.vpmovsqb.vpmovusqb
VPMOVUSQD|Down Convert QWord to DWord|vpmovqd.vpmovsqd.vpmovusqd
VPMOVUSQW|Down Convert QWord to Word|vpmovqw.vpmovsqw.vpmovusqw
VPMOVUSWB|Down Convert Word to Byte|vpmovwb.vpmovswb.vpmovuswb
VPMOVW2M|Convert a Vector Register to a Mask|vpmovb2m.vpmovw2m.vpmovd2m.vpmovq2m
VPMOVWB|Down Convert Word to Byte|vpmovwb.vpmovswb.vpmovuswb
VPMULTISHIFTQB|Select Packed Unaligned Bytes From Quadword Sources|vpmultishiftqb
VPOPCNT|Return the Count of Number of Bits Set to 1 in BYTE/WORD/DWORD/QWORD|vpopcnt
VPROLD|Bit Rotate Left|vprold.vprolvd.vprolq.vprolvq
VPROLQ|Bit Rotate Left|vprold.vprolvd.vprolq.vprolvq
VPROLVD|Bit Rotate Left|vprold.vprolvd.vprolq.vprolvq
VPROLVQ|Bit Rotate Left|vprold.vprolvd.vprolq.vprolvq
VPRORD|Bit Rotate Right|vprord.vprorvd.vprorq.vprorvq
VPRORQ|Bit Rotate Right|vprord.vprorvd.vprorq.vprorvq
VPRORVD|Bit Rotate Right|vprord.vprorvd.vprorq.vprorvq
VPRORVQ|Bit Rotate Right|vprord.vprorvd.vprorq.vprorvq
VPSCATTERDD|Scatter Packed Dword, PackedQword with Signed Dword, Signed Qword Indices|vpscatterdd.vpscatterdq.vpscatterqd.vpscatterqq
VPSCATTERDQ|Scatter Packed Dword, PackedQword with Signed Dword, Signed Qword Indices|vpscatterdd.vpscatterdq.vpscatterqd.vpscatterqq
VPSCATTERQD|Scatter Packed Dword, PackedQword with Signed Dword, Signed Qword Indices|vpscatterdd.vpscatterdq.vpscatterqd.vpscatterqq
VPSCATTERQQ|Scatter Packed Dword, PackedQword with Signed Dword, Signed Qword Indices|vpscatterdd.vpscatterdq.vpscatterqd.vpscatterqq
VPSHLD|Concatenate and Shift Packed Data Left Logical|vpshld
VPSHLDV|Concatenate and Variable Shift Packed Data Left Logical|vpshldv
VPSHRD|Concatenate and Shift Packed Data Right Logical|vpshrd
VPSHRDV|Concatenate and Variable Shift Packed Data Right Logical|vpshrdv
VPSHUFBITQMB|Shuffle Bits From Quadword Elements Using Byte Indexes Into Mask|vpshufbitqmb
VPSLLVD|Variable Bit Shift Left Logical|vpsllvw.vpsllvd.vpsllvq
VPSLLVQ|Variable Bit Shift Left Logical|vpsllvw.vpsllvd.vpsllvq
VPSLLVW|Variable Bit Shift Left Logical|vpsllvw.vpsllvd.vpsllvq
VPSRAVD|Variable Bit Shift Right Arithmetic|vpsravw.vpsravd.vpsravq
VPSRAVQ|Variable Bit Shift Right Arithmetic|vpsravw.vpsravd.vpsravq
VPSRAVW|Variable Bit Shift Right Arithmetic|vpsravw.vpsravd.vpsravq
VPSRLVD|Variable Bit Shift Right Logical|vpsrlvw.vpsrlvd.vpsrlvq
VPSRLVQ|Variable Bit Shift Right Logical|vpsrlvw.vpsrlvd.vpsrlvq
VPSRLVW|Variable Bit Shift Right Logical|vpsrlvw.vpsrlvd.vpsrlvq
VPTERNLOGD|Bitwise Ternary Logic|vpternlogd.vpternlogq
VPTERNLOGQ|Bitwise Ternary Logic|vpternlogd.vpternlogq
VPTESTMB|Logical AND and Set Mask|vptestmb.vptestmw.vptestmd.vptestmq
VPTESTMD|Logical AND and Set Mask|vptestmb.vptestmw.vptestmd.vptestmq
VPTESTMQ|Logical AND and Set Mask|vptestmb.vptestmw.vptestmd.vptestmq
VPTESTMW|Logical AND and Set Mask|vptestmb.vptestmw.vptestmd.vptestmq
VPTESTNMB|Logical NAND and Set|vptestnmb.vptestnmw.vptestnmd.vptestnmq
VPTESTNMD|Logical NAND and Set|vptestnmb.vptestnmw.vptestnmd.vptestnmq
VPTESTNMQ|Logical NAND and Set|vptestnmb.vptestnmw.vptestnmd.vptestnmq
VPTESTNMW|Logical NAND and Set|vptestnmb.vptestnmw.vptestnmd.vptestnmq
VRANGEPD|Range Restriction Calculation for Packed Pairs of Float64 Values|vrangepd
VRANGEPS|Range Restriction Calculation for Packed Pairs of Float32 Values|vrangeps
VRANGESD|Range Restriction Calculation From a Pair of Scalar Float64 Values|vrangesd
VRANGESS|Range Restriction Calculation From a Pair of Scalar Float32 Values|vrangess
VRCP14PD|Compute Approximate Reciprocals of Packed Float64 Values|vrcp14pd
VRCP14PS|Compute Approximate Reciprocals of Packed Float32 Values|vrcp14ps
VRCP14SD|Compute Approximate Reciprocal of Scalar Float64 Value|vrcp14sd
VRCP14SS|Compute Approximate Reciprocal of Scalar Float32 Value|vrcp14ss
VRCPPH|Compute Reciprocals of Packed FP16 Values|vrcpph
VRCPSH|Compute Reciprocal of Scalar FP16 Value|vrcpsh
VREDUCEPD|Perform Reduction Transformation on Packed Float64 Values|vreducepd
VREDUCEPH|Perform Reduction Transformation on Packed FP16 Values|vreduceph
VREDUCEPS|Perform Reduction Transformation on Packed Float32 Values|vreduceps
VREDUCESD|Perform a Reduction Transformation on a Scalar Float64 Value|vreducesd
VREDUCESH|Perform Reduction Transformation on Scalar FP16 Value|vreducesh
VREDUCESS|Perform a Reduction Transformation on a Scalar Float32 Value|vreducess
VRNDSCALEPD|Round Packed Float64 Values to Include a Given Number of Fraction Bits|vrndscalepd
VRNDSCALEPH|Round Packed FP16 Values to Include a Given Number of Fraction Bits|vrndscaleph
VRNDSCALEPS|Round Packed Float32 Values to Include a Given Number of Fraction Bits|vrndscaleps
VRNDSCALESD|Round Scalar Float64 Value to Include a Given Number of Fraction Bits|vrndscalesd
VRNDSCALESH|Round Scalar FP16 Value to Include a Given Number of Fraction Bits|vrndscalesh
VRNDSCALESS|Round Scalar Float32 Value to Include a Given Number of Fraction Bits|vrndscaless
VRSQRT14PD|Compute Approximate Reciprocals of Square Roots of Packed Float64 Values|vrsqrt14pd
VRSQRT14PS|Compute Approximate Reciprocals of Square Roots of Packed Float32 Values|vrsqrt14ps
VRSQRT14SD|Compute Approximate Reciprocal of Square Root of Scalar Float64 Value|vrsqrt14sd
VRSQRT14SS|Compute Approximate Reciprocal of Square Root of Scalar Float32 Value|vrsqrt14ss
VRSQRTPH|Compute Reciprocals of Square Roots of Packed FP16 Values|vrsqrtph
VRSQRTSH|Compute Approximate Reciprocal of Square Root of Scalar FP16 Value|vrsqrtsh
VSCALEFPD|Scale Packed Float64 Values With Float64 Values|vscalefpd
VSCALEFPH|Scale Packed FP16 Values with FP16 Values|vscalefph
VSCALEFPS|Scale Packed Float32 Values With Float32 Values|vscalefps
VSCALEFSD|Scale Scalar Float64 Values With Float64 Values|vscalefsd
VSCALEFSH|Scale Scalar FP16 Values with FP16 Values|vscalefsh
VSCALEFSS|Scale Scalar Float32 Value With Float32 Value|vscalefss
VSCATTERDPD|Scatter Packed Single, PackedDouble with Signed Dword and Qword Indices|vscatterdps.vscatterdpd.vscatterqps.vscatterqpd
VSCATTERDPS|Scatter Packed Single, PackedDouble with Signed Dword and Qword Indices|vscatterdps.vscatterdpd.vscatterqps.vscatterqpd
VSCATTERQPD|Scatter Packed Single, PackedDouble with Signed Dword and Qword Indices|vscatterdps.vscatterdpd.vscatterqps.vscatterqpd
VSCATTERQPS|Scatter Packed Single, PackedDouble with Signed Dword and Qword Indices|vscatterdps.vscatterdpd.vscatterqps.vscatterqpd
VSHUFF32x4|Shuffle Packed Values at 128-BitGranularity|vshuff32x4.vshuff64x2.vshufi32x4.vshufi64x2
VSHUFF64x2|Shuffle Packed Values at 128-BitGranularity|vshuff32x4.vshuff64x2.vshufi32x4.vshufi64x2
VSHUFI32x4|Shuffle Packed Values at 128-BitGranularity|vshuff32x4.vshuff64x2.vshufi32x4.vshufi64x2
VSHUFI64x2|Shuffle Packed Values at 128-BitGranularity|vshuff32x4.vshuff64x2.vshufi32x4.vshufi64x2
VSQRTPH|Compute Square Root of Packed FP16 Values|vsqrtph
VSQRTSH|Compute Square Root of Scalar FP16 Value|vsqrtsh
VSUBPH|Subtract Packed FP16 Values|vsubph
VSUBSH|Subtract Scalar FP16 Value|vsubsh
VTESTPD|Packed Bit Test|vtestpd.vtestps
VTESTPS|Packed Bit Test|vtestpd.vtestps
VUCOMISH|Unordered Compare Scalar FP16 Values and Set EFLAGS|vucomish
VZEROALL|Zero XMM, YMM, and ZMM Registers|vzeroall
VZEROUPPER|Zero Upper Bits of YMM and ZMM Registers|vzeroupper
WAIT|Wait|wait.fwait
WBINVD|Write Back and Invalidate Cache|wbinvd
WBNOINVD|Write Back and Do Not Invalidate Cache|wbnoinvd
WRFSBASE|Write FS/GS Segment Base|wrfsbase.wrgsbase
WRGSBASE|Write FS/GS Segment Base|wrfsbase.wrgsbase
WRMSR|Write to Model Specific Register|wrmsr
WRPKRU|Write Data to User Page Key Register|wrpkru
WRSSD|Write to Shadow Stack|wrssd.wrssq
WRSSQ|Write to Shadow Stack|wrssd.wrssq
WRUSSD|Write to User Shadow Stack|wrussd.wrussq
WRUSSQ|Write to User Shadow Stack|wrussd.wrussq
XABORT|Transactional Abort|xabort
XACQUIRE|Hardware Lock Elision Prefix Hints|xacquire.xrelease
XADD|Exchange and Add|xadd
XBEGIN|Transactional Begin|xbegin
XCHG|Exchange Register/Memory With Register|xchg
XEND|Transactional End|xend
XGETBV|Get Value of Extended Control Register|xgetbv
XLAT|Table Look-up Translation|xlat.xlatb
XLATB|Table Look-up Translation|xlat.xlatb
XOR|Logical Exclusive OR|xor
XORPD|Bitwise Logical XOR of Packed Double Precision Floating-Point Values|xorpd
XORPS|Bitwise Logical XOR of Packed Single Precision Floating-Point Values|xorps
XRELEASE|Hardware Lock Elision Prefix Hints|xacquire.xrelease
XRESLDTRK|Resume Tracking Load Addresses|xresldtrk
XRSTOR|Restore Processor Extended States|xrstor
XRSTORS|Restore Processor Extended States Supervisor|xrstors
XSAVE|Save Processor Extended States|xsave
XSAVEC|Save Processor Extended States With Compaction|xsavec
XSAVEOPT|Save Processor Extended States Optimized|xsaveopt
XSAVES|Save Processor Extended States Supervisor|xsaves
XSETBV|Set Extended Control Register|xsetbv
XSUSLDTRK|Suspend Tracking Load Addresses|xsusldtrk
XTEST|Test if in Transactional Execution|xtest
ENCLS|Execute an Enclave System Function of Specified Leaf Number|encls
ENCLS[EADD]|Add a Page to an Uninitialized Enclave|eadd
ENCLS[EAUG]|Add a Page to an Initialized Enclave|eaug
ENCLS[EBLOCK]|Mark a page in EPC as Blocked|eblock
ENCLS[ECREATE]|Create an SECS page in the Enclave Page Cache|ecreate
ENCLS[EDBGRD]|Read From a Debug Enclave|edbgrd
ENCLS[EDBGWR]|Write to a Debug Enclave|edbgwr
ENCLS[EEXTEND]|Extend Uninitialized Enclave Measurement by 256 Bytes|eextend
ENCLS[EINIT]|Initialize an Enclave for Execution|einit
ENCLS[ELDBC]|Load an EPC Page and Mark its State|eldb.eldu.eldbc.elduc
ENCLS[ELDB]|Load an EPC Page and Mark its State|eldb.eldu.eldbc.elduc
ENCLS[ELDUC]|Load an EPC Page and Mark its State|eldb.eldu.eldbc.elduc
ENCLS[ELDU]|Load an EPC Page and Mark its State|eldb.eldu.eldbc.elduc
ENCLS[EMODPR]|Restrict the Permissions of an EPC Page|emodpr
ENCLS[EMODT]|Change the Type of an EPC Page|emodt
ENCLS[EPA]|Add Version Array|epa
ENCLS[ERDINFO]|Read Type and Status Information About an EPC Page|erdinfo
ENCLS[EREMOVE]|Remove a page from the EPC|eremove
ENCLS[ETRACKC]|Activates EBLOCK Checks|etrackc
ENCLS[ETRACK]|Activates EBLOCK Checks|etrack
ENCLS[EWB]|Invalidate an EPC Page and Write out to Main Memory|ewb
ENCLU|Execute an Enclave User Function of Specified Leaf Number|enclu
ENCLU[EACCEPTCOPY]|Initialize a Pending Page|eacceptcopy
ENCLU[EACCEPT]|Accept Changes to an EPC Page|eaccept
ENCLU[EDECCSSA]|Decrements TCS.CSSA|edeccssa
ENCLU[EENTER]|Enters an Enclave|eenter
ENCLU[EEXIT]|Exits an Enclave|eexit
ENCLU[EGETKEY]|Retrieves a Cryptographic Key|egetkey
ENCLU[EMODPE]|Extend an EPC Page Permissions|emodpe
ENCLU[EREPORT]|Create a Cryptographic Report of the Enclave|ereport
ENCLU[ERESUME]|Re-Enters an Enclave|eresume
ENCLV|Execute an Enclave VMM Function of Specified Leaf Number|enclv
ENCLV[EDECVIRTCHILD]|Decrement VIRTCHILDCNT in SECS|edecvirtchild
ENCLV[EINCVIRTCHILD]|Increment VIRTCHILDCNT in SECS|eincvirtchild
ENCLV[ESETCONTEXT]|Set the ENCLAVECONTEXT Field in SECS|esetcontext
GETSEC[CAPABILITIES]|Report the SMX Capabilities|capabilities
GETSEC[ENTERACCS]|Execute Authenticated Chipset Code|enteraccs
GETSEC[EXITAC]|Exit Authenticated Code Execution Mode|exitac
GETSEC[PARAMETERS]|Report the SMX Parameters|parameters
GETSEC[SENTER]|Enter a Measured Environment|senter
GETSEC[SEXIT]|Exit Measured Environment|sexit
GETSEC[SMCTRL]|SMX Mode Control|smctrl
GETSEC[WAKEUP]|Wake Up Sleeping Processors in Measured Environment|wakeup
INVEPT|Invalidate Translations Derived from EPT|invept
INVVPID|Invalidate Translations Based on VPID|invvpid
VMCALL|Call to VM Monitor|vmcall
VMCLEAR|Clear Virtual-Machine Control Structure|vmclear
VMFUNC|Invoke VM function|vmfunc
VMLAUNCH|Launch/Resume Virtual Machine|vmlaunch.vmresume
VMPTRLD|Load Pointer to Virtual-Machine Control Structure|vmptrld
VMPTRST|Store Pointer to Virtual-Machine Control Structure|vmptrst
VMREAD|Read Field from Virtual-Machine Control Structure|vmread
VMRESUME|Launch/Resume Virtual Machine|vmlaunch.vmresume
VMRESUME|Resume Virtual Machine|vmresume
VMWRITE|Write Field to Virtual-Machine Control Structure|vmwrite
VMXOFF|Leave VMX Operation|vmxoff
VMXON|Enter VMX Operation|vmxon
PREFETCHWT1|Prefetch Vector Data Into Caches With Intent to Write and T1 Hint|prefetchwt1
V4FMADDPS|Packed Single Precision Floating-Point Fused Multiply-Add(4-Iterations)|v4fmaddps.v4fnmaddps
V4FMADDSS|Scalar Single Precision Floating-Point Fused Multiply-Add(4-Iterations)|v4fmaddss.v4fnmaddss
V4FNMADDPS|Packed Single Precision Floating-Point Fused Multiply-Add(4-Iterations)|v4fmaddps.v4fnmaddps
V4FNMADDSS|Scalar Single Precision Floating-Point Fused Multiply-Add(4-Iterations)|v4fmaddss.v4fnmaddss
VEXP2PD|Approximation to the Exponential 2^x of Packed Double Precision Floating-PointValues With Less Than 2^-23 Relative Error|vexp2pd
VEXP2PS|Approximation to the Exponential 2^x of Packed Single Precision Floating-PointValues With Less Than 2^-23 Relative Error|vexp2ps
VGATHERPF0DPD|Sparse PrefetchPacked SP/DP Data Values With Signed Dword, Signed Qword Indices Using T0 Hint|vgatherpf0dps.vgatherpf0qps.vgatherpf0dpd.vgatherpf0qpd
VGATHERPF0DPS|Sparse PrefetchPacked SP/DP Data Values With Signed Dword, Signed Qword Indices Using T0 Hint|vgatherpf0dps.vgatherpf0qps.vgatherpf0dpd.vgatherpf0qpd
VGATHERPF0QPD|Sparse PrefetchPacked SP/DP Data Values With Signed Dword, Signed Qword Indices Using T0 Hint|vgatherpf0dps.vgatherpf0qps.vgatherpf0dpd.vgatherpf0qpd
VGATHERPF0QPS|Sparse PrefetchPacked SP/DP Data Values With Signed Dword, Signed Qword Indices Using T0 Hint|vgatherpf0dps.vgatherpf0qps.vgatherpf0dpd.vgatherpf0qpd
VGATHERPF1DPD|Sparse PrefetchPacked SP/DP Data Values With Signed Dword, Signed Qword Indices Using T1 Hint|vgatherpf1dps.vgatherpf1qps.vgatherpf1dpd.vgatherpf1qpd
VGATHERPF1DPS|Sparse PrefetchPacked SP/DP Data Values With Signed Dword, Signed Qword Indices Using T1 Hint|vgatherpf1dps.vgatherpf1qps.vgatherpf1dpd.vgatherpf1qpd
VGATHERPF1QPD|Sparse PrefetchPacked SP/DP Data Values With Signed Dword, Signed Qword Indices Using T1 Hint|vgatherpf1dps.vgatherpf1qps.vgatherpf1dpd.vgatherpf1qpd
VGATHERPF1QPS|Sparse PrefetchPacked SP/DP Data Values With Signed Dword, Signed Qword Indices Using T1 Hint|vgatherpf1dps.vgatherpf1qps.vgatherpf1dpd.vgatherpf1qpd
VP4DPWSSD|Dot Product of Signed Words With Dword Accumulation (4-Iterations)|vp4dpwssd
VP4DPWSSDS|Dot Product of Signed Words With Dword Accumulation and Saturation(4-Iterations)|vp4dpwssds
VRCP28PD|Approximation to the Reciprocal of Packed Double Precision Floating-Point ValuesWith Less Than 2^-28 Relative Error|vrcp28pd
VRCP28PS|Approximation to the Reciprocal of Packed Single Precision Floating-Point ValuesWith Less Than 2^-28 Relative Error|vrcp28ps
VRCP28SD|Approximation to the Reciprocal of Scalar Double Precision Floating-Point ValueWith Less Than 2^-28 Relative Error|vrcp28sd
VRCP28SS|Approximation to the Reciprocal of Scalar Single Precision Floating-Point ValueWith Less Than 2^-28 Relative Error|vrcp28ss
VRSQRT28PD|Approximation to the Reciprocal Square Root of Packed Double PrecisionFloating-Point Values With Less Than 2^-28 Relative Error|vrsqrt28pd
VRSQRT28PS|Approximation to the Reciprocal Square Root of Packed Single PrecisionFloating-Point Values With Less Than 2^-28 Relative Error|vrsqrt28ps
VRSQRT28SD|Approximation to the Reciprocal Square Root of Scalar Double PrecisionFloating-Point Value With Less Than 2^-28 Relative Error|vrsqrt28sd
VRSQRT28SS|Approximation to the Reciprocal Square Root of Scalar Single Precision Floating-Point Value With Less Than 2^-28 Relative Error|vrsqrt28ss
VSCATTERPF0DPD|Sparse PrefetchPacked SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint With Intentto Write|vscatterpf0dps.vscatterpf0qps.vscatterpf0dpd.vscatterpf0qpd
VSCATTERPF0DPS|Sparse PrefetchPacked SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint With Intentto Write|vscatterpf0dps.vscatterpf0qps.vscatterpf0dpd.vscatterpf0qpd
VSCATTERPF0QPD|Sparse PrefetchPacked SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint With Intentto Write|vscatterpf0dps.vscatterpf0qps.vscatterpf0dpd.vscatterpf0qpd
VSCATTERPF0QPS|Sparse PrefetchPacked SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint With Intentto Write|vscatterpf0dps.vscatterpf0qps.vscatterpf0dpd.vscatterpf0qpd
VSCATTERPF1DPD|Sparse PrefetchPacked SP/DP Data Values With Signed Dword, Signed Qword Indices Using T1 Hint With Intentto Write|vscatterpf1dps.vscatterpf1qps.vscatterpf1dpd.vscatterpf1qpd
VSCATTERPF1DPS|Sparse PrefetchPacked SP/DP Data Values With Signed Dword, Signed Qword Indices Using T1 Hint With Intentto Write|vscatterpf1dps.vscatterpf1qps.vscatterpf1dpd.vscatterpf1qpd
VSCATTERPF1QPD|Sparse PrefetchPacked SP/DP Data Values With Signed Dword, Signed Qword Indices Using T1 Hint With Intentto Write|vscatterpf1dps.vscatterpf1qps.vscatterpf1dpd.vscatterpf1qpd
VSCATTERPF1QPS|Sparse PrefetchPacked SP/DP Data Values With Signed Dword, Signed Qword Indices Using T1 Hint With Intentto Write|vscatterpf1dps.vscatterpf1qps.vscatterpf1dpd.vscatterpf1qpd