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8.9 KiB
HTML
251 lines
8.9 KiB
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<html xmlns="http://www.w3.org/1999/xhtml" xmlns:svg="http://www.w3.org/2000/svg" xmlns:x86="http://www.felixcloutier.com/x86"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8"><link rel="stylesheet" type="text/css" href="style.css"></link><title>EINCVIRTCHILD
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— Increment VIRTCHILDCNT in SECS</title></head><body><header><nav><ul><li><a href='index.html'>Index</a></li><li>December 2023</li></ul></nav></header><h1>EINCVIRTCHILD
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— Increment VIRTCHILDCNT in SECS</h1>
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<table>
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<tr>
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<th>Opcode/Instruction</th>
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<th>Op/En</th>
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<th>64/32 bit Mode Support</th>
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<th>CPUID Feature Flag</th>
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<th>Description</th></tr>
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<tr>
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<td>EAX = 01H ENCLV[EINCVIRTCHILD]</td>
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<td>IR</td>
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<td>V/V</td>
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<td>EAX[5]</td>
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<td>This leaf function increments the SECS VIRTCHILDCNT field.</td></tr></table>
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<h2 id="instruction-operand-encoding">Instruction Operand Encoding<a class="anchor" href="#instruction-operand-encoding">
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¶
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</a></h2>
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<table>
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<tr>
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<td>Op/En</td>
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<td colspan="2">EAX</td>
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<td>RBX</td>
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<td>RCX</td></tr>
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<tr>
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<td>IR</td>
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<td>EINCVIRTCHILD (In)</td>
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<td>Return error code (Out)</td>
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<td>Address of an enclave page (In)</td>
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<td>Address of an SECS page (In)</td></tr></table>
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<h3 id="description">Description<a class="anchor" href="#description">
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¶
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</a></h3>
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<p>This instruction increments the SECS VIRTCHILDCNT field. This instruction can only be executed when the current privilege level is 0.</p>
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<p>The content of RCX is an effective address of an EPC page. The DS segment is used to create a linear address. Segment override is not supported.</p>
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<h2 id="eincvirtchild-memory-parameter-semantics">EINCVIRTCHILD Memory Parameter Semantics<a class="anchor" href="#eincvirtchild-memory-parameter-semantics">
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¶
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</a></h2>
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<table>
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<tr>
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<td>EPCPAGE</td>
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<td>SECS</td></tr>
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<tr>
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<td>Read/Write access permitted by Non Enclave</td>
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<td>Read access permitted by Enclave</td></tr></table>
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<p>The instruction faults if any of the following:</p>
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<h2 id="eincvirtchild-faulting-conditions">EINCVIRTCHILD Faulting Conditions<a class="anchor" href="#eincvirtchild-faulting-conditions">
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¶
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</a></h2>
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<table>
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<tr>
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<td>A memory operand effective address is outside the DS segment limit (32b mode).</td>
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<td>A page fault occurs in accessing memory operands.</td></tr>
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<tr>
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<td>DS segment is unusable (32b mode).</td>
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<td>RBX does not refer to an enclave page (REG, TCS, TRIM, SECS).</td></tr>
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<tr>
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<td>A memory address is in a non-canonical form (64b mode).</td>
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<td>RCX does not refer to an SECS page.</td></tr>
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<tr>
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<td>A memory operand is not properly aligned.</td>
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<td>RBX does not refer to an enclave page associated with SECS referenced in RCX.</td></tr></table>
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<h3 id="concurrency-restrictions">Concurrency Restrictions<a class="anchor" href="#concurrency-restrictions">
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¶
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</a></h3>
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<figure id="tbl-38-78">
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<table>
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<tr>
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<th rowspan="2">Leaf</th>
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<th rowspan="2">Parameter</th>
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<th colspan="3">Base Concurrency Restrictions</th></tr>
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<tr>
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<th>Access</th>
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<th>On Conflict</th>
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<th>SGX_CONFLICT VM Exit Qualification</th></tr>
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<tr>
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<td rowspan="2">EINCVIRTCHILD</td>
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<td>Target [DS:RBX]</td>
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<td>Shared</td>
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<td>SGX_EPC_PAGE_ CONFLICT</td>
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<td></td></tr>
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<tr>
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<td>SECS [DS:RCX]</td>
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<td>Concurrent</td>
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<td></td>
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<td></td></tr></table>
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<figcaption><span class="not-imported">Table 38-78</span>. Base Concurrency Restrictions of EINCVIRTCHILD</figcaption></figure>
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<figure id="tbl-38-79">
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<table>
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<tr>
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<th rowspan="3">Leaf</th>
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<th rowspan="3">Parameter</th>
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<th colspan="6">Additional Concurrency Restrictions</th></tr>
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<tr>
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<th colspan="2">vs. EACCEPT, EACCEPTCOPY, EMODPE, EMODPR, EMODT</th>
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<th colspan="2">vs. EADD, EEXTEND, EINIT</th>
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<th colspan="2">vs. ETRACK, ETRACKC</th></tr>
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<tr>
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<th>Access</th>
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<th>On Conflict</th>
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<th>Access</th>
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<th>On Conflict</th>
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<th>Access</th>
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<th>On Conflict</th></tr>
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<tr>
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<td rowspan="2">EINCVIRTCHILD</td>
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<td>Target [DS:RBX]</td>
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<td>Concurrent</td>
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<td></td>
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<td>Concurrent</td>
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<td></td>
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<td>Concurrent</td>
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<td></td></tr>
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<tr>
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<td>SECS [DS:RCX]</td>
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<td>Concurrent</td>
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<td></td>
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<td>Concurrent</td>
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<td></td>
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<td>Concurrent</td>
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<td></td></tr></table>
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<figcaption><span class="not-imported">Table 38-79</span>. Additional Concurrency Restrictions of EINCVIRTCHILD</figcaption></figure>
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<h3 id="operation">Operation<a class="anchor" href="#operation">
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¶
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</a></h3>
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<h2 id="temp-variables-in-eincvirtchild-operational-flow">Temp Variables in EINCVIRTCHILD Operational Flow<a class="anchor" href="#temp-variables-in-eincvirtchild-operational-flow">
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¶
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</a></h2>
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<table>
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<tr>
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<th>Name</th>
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<th>Type</th>
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<th>Size (bits)</th>
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<th>Description</th></tr>
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<tr>
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<td>TMP_SECS</td>
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<td>Physical Address</td>
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<td>64</td>
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<td>Physical address of the SECS of the page being modified.</td></tr></table>
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<h2 id="eincvirtchild-return-value-in-rax">EINCVIRTCHILD Return Value in RAX<a class="anchor" href="#eincvirtchild-return-value-in-rax">
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¶
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</a></h2>
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<table>
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<tr>
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<th>Error</th>
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<th>Value</th>
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<th>Description</th></tr>
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<tr>
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<td>No Error</td>
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<td>0</td>
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<td>EINCVIRTCHILD Successful.</td></tr>
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<tr>
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<td>SGX_EPC_PAGE_CONFLICT</td>
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<td></td>
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<td>Failure due to concurrent operation of another SGX instruction.</td></tr></table>
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<p>(* check alignment of DS:RBX *)</p>
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<p>IF (DS:RBX is not 4K aligned) THEN</p>
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<p>#GP(0); FI;</p>
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<p>(* check DS:RBX is an linear address of an EPC page *)</p>
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<p>IF (DS:RBX does not resolve within an EPC) THEN</p>
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<p>#PF(DS:RBX, PFEC.SGX); FI;</p>
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<p>(* check DS:RCX is an linear address of an EPC page *)</p>
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<p>IF (DS:RCX does not resolve within an EPC) THEN</p>
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<p>#PF(DS:RCX, PFEC.SGX); FI;</p>
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<p>(* Check the EPCPAGE for concurrency *)</p>
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<p>IF (EPCPAGE is being modified) THEN</p>
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<p>RFLAGS.ZF = 1;</p>
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<p>RAX = SGX_EPC_PAGE_CONFLICT;</p>
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<p>goto DONE;</p>
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<p>FI;</p>
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<p>(* check that the EPC page is valid *)</p>
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<p>IF (EPCM(DS:RBX).VALID = 0) THEN</p>
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<p>#PF(DS:RBX, PFEC.SGX); FI;</p>
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<p>(* check that the EPC page has the correct type and that the back pointer matches the pointer passed as the pointer to parent *)</p>
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<p>IF ((EPCM(DS:RBX).PAGE_TYPE = PT_REG) or</p>
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<p>(EPCM(DS:RBX).PAGE_TYPE = PT_TCS) or</p>
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<p>(EPCM(DS:RBX).PAGE_TYPE = PT_TRIM) or</p>
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<p>(EPCM(DS:RBX).PAGE_TYPE = PT_SS_FIRST) or</p>
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<p>(EPCM(DS:RBX).PAGE_TYPE = PT_SS_REST))</p>
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<p>THEN</p>
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<p>(* get the SECS of DS:RBX *)</p>
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<p>TMP_SECS := Address of SECS for (DS:RBX);</p>
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<p>ELSE IF (EPCM(DS:RBX).PAGE_TYPE = PT_SECS) THEN</p>
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<p>(* get the physical address of DS:RBX *)</p>
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<p>TMP_SECS := Physical_Address(DS:RBX);</p>
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<p>ELSE</p>
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<p>(* EINCVIRTCHILD called on page of incorrect type *)</p>
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<p>#PF(DS:RBX, PFEC.SGX); FI;</p>
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<p>IF (TMP_SECS ≠ Physical_Address(DS:RCX)) THEN</p>
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<p>#GP(0); FI;</p>
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<p>(* Atomically increment virtchild counter *)</p>
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<p>Locked_Increment(SECS(TMP_SECS).VIRTCHILDCNT);</p>
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<p>RFLAGS.ZF := 0;</p>
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<p>RAX := 0;</p>
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<p>DONE:</p>
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<p>(* clear flags *)</p>
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<p>RFLAGS.CF := 0;</p>
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<p>RFLAGS.PF := 0;</p>
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<p>RFLAGS.AF := 0;</p>
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<p>RFLAGS.OF := 0;</p>
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<p>RFLAGS.SF := 0;</p>
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<h3 id="flags-affected">Flags Affected<a class="anchor" href="#flags-affected">
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¶
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</a></h3>
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<p>ZF is set if EINCVIRTCHILD fails due to concurrent operation with another SGX instruction; otherwise cleared.</p>
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<h3 class="exceptions" id="protected-mode-exceptions">Protected Mode Exceptions<a class="anchor" href="#protected-mode-exceptions">
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¶
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</a></h3>
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<table>
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<tr>
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<td rowspan="4">#GP(0)</td>
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<td>If a memory operand effective address is outside the DS segment limit.</td></tr>
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<tr>
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<td>If DS segment is unusable.</td></tr>
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<tr>
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<td>If a memory operand is not properly aligned.</td></tr>
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<tr>
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<td>RBX does not refer to an enclave page associated with SECS referenced in RCX.</td></tr>
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<tr>
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<td rowspan="3">#PF(error</td>
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<td>code) If a page fault occurs in accessing memory operands.</td></tr>
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<tr>
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<td>If RBX does not refer to an enclave page (REG, TCS, TRIM, SECS).</td></tr>
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<tr>
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<td>If RCX does not refer to an SECS page.</td></tr></table>
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<h3 class="exceptions" id="64-bit-mode-exceptions">64-Bit Mode Exceptions<a class="anchor" href="#64-bit-mode-exceptions">
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¶
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</a></h3>
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<table>
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<tr>
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<td rowspan="3">#GP(0)</td>
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<td>If a memory address is in a non-canonical form.</td></tr>
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<tr>
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<td>If a memory operand is not properly aligned.</td></tr>
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<tr>
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<td>RBX does not refer to an enclave page associated with SECS referenced in RCX.</td></tr>
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<tr>
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<td rowspan="3">#PF(error</td>
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<td>code) If a page fault occurs in accessing memory operands.</td></tr>
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<tr>
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<td>If RBX does not refer to an enclave page (REG, TCS, TRIM, SECS).</td></tr>
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<tr>
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<td>If RCX does not refer to an SECS page.</td></tr></table><footer><p>
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This UNOFFICIAL, mechanically-separated, non-verified reference is provided for convenience, but it may be
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inc<span style="opacity: 0.2">omp</span>lete or b<sub>r</sub>oke<sub>n</sub> in various obvious or non-obvious
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ways. Refer to <a href="https://software.intel.com/en-us/download/intel-64-and-ia-32-architectures-sdm-combined-volumes-1-2a-2b-2c-2d-3a-3b-3c-3d-and-4">Intel® 64 and IA-32 Architectures Software Developer’s Manual</a> for anything serious.
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</p></footer></body></html>
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