# VPMOVDB/VPMOVSDB/VPMOVUSDB — Down Convert DWord to Byte

Opcode/Instruction | Op / En | 64/32 bit Mode Support | CPUID Feature Flag | Description
--- | --- | --- | --- | ---
EVEX.128.F3.0F38.W0 31 /r VPMOVDB xmm1/m32 {k1}{z}, xmm2 | A | V/V | AVX512VL AVX512F | Converts 4 packed double-word integers from xmm2 into 4 packed byte integers in xmm1/m32 with truncation under writemask k1.
EVEX.128.F3.0F38.W0 21 /r VPMOVSDB xmm1/m32 {k1}{z}, xmm2 | A | V/V | AVX512VL AVX512F | Converts 4 packed signed double-word integers from xmm2 into 4 packed signed byte integers in xmm1/m32 using signed saturation under writemask k1.
EVEX.128.F3.0F38.W0 11 /r VPMOVUSDB xmm1/m32 {k1}{z}, xmm2 | A | V/V | AVX512VL AVX512F | Converts 4 packed unsigned double-word integers from xmm2 into 4 packed unsigned byte integers in xmm1/m32 using unsigned saturation under writemask k1.
EVEX.256.F3.0F38.W0 31 /r VPMOVDB xmm1/m64 {k1}{z}, ymm2 | A | V/V | AVX512VL AVX512F | Converts 8 packed double-word integers from ymm2 into 8 packed byte integers in xmm1/m64 with truncation under writemask k1.
EVEX.256.F3.0F38.W0 21 /r VPMOVSDB xmm1/m64 {k1}{z}, ymm2 | A | V/V | AVX512VL AVX512F | Converts 8 packed signed double-word integers from ymm2 into 8 packed signed byte integers in xmm1/m64 using signed saturation under writemask k1.
EVEX.256.F3.0F38.W0 11 /r VPMOVUSDB xmm1/m64 {k1}{z}, ymm2 | A | V/V | AVX512VL AVX512F | Converts 8 packed unsigned double-word integers from ymm2 into 8 packed unsigned byte integers in xmm1/m64 using unsigned saturation under writemask k1.
EVEX.512.F3.0F38.W0 31 /r VPMOVDB xmm1/m128 {k1}{z}, zmm2 | A | V/V | AVX512F | Converts 16 packed double-word integers from zmm2 into 16 packed byte integers in xmm1/m128 with truncation under writemask k1.
EVEX.512.F3.0F38.W0 21 /r VPMOVSDB xmm1/m128 {k1}{z}, zmm2 | A | V/V | AVX512F | Converts 16 packed signed double-word integers from zmm2 into 16 packed signed byte integers in xmm1/m128 using signed saturation under writemask k1.
EVEX.512.F3.0F38.W0 11 /r VPMOVUSDB xmm1/m128 {k1}{z}, zmm2 | A | V/V | AVX512F | Converts 16 packed unsigned double-word integers from zmm2 into 16 packed unsigned byte integers in xmm1/m128 using unsigned saturation under writemask k1.

## Instruction Operand Encoding ¶

Op/En | Tuple Type | Operand 1 | Operand 2 | Operand 3 | Operand 4
--- | --- | --- | --- | --- | ---
A | Quarter Mem | ModRM:r/m (w) | ModRM:reg (r) | N/A | N/A

### Description ¶

VPMOVDB down converts 32-bit integer elements in the source operand (the second operand) into packed bytes using truncation. VPMOVSDB converts signed 32-bit integers into packed signed bytes using signed saturation. VPMOVUSDB convert unsigned double-word values into unsigned byte values using unsigned saturation.

The source operand is a ZMM/YMM/XMM register. The destination operand is a XMM register or a 128/64/32-bit memory location.

Down-converted byte elements are written to the destination operand (the first operand) from the least-significant byte. Byte elements of the destination operand are updated according to the writemask. Bits (MAXVL-1:128/64/32) of the register destination are zeroed.

EVEX.vvvv is reserved and must be 1111b otherwise instructions will #UD.

### Operation ¶

#### VPMOVDB instruction (EVEX encoded versions) when dest is a register ¶

    (KL, VL) = (4, 128), (8, 256), (16, 512)
    FOR j := 0 TO KL-1
        i := j * 8
        m := j * 32
        IF k1[j] OR *no writemask*
            THEN DEST[i+7:i] := TruncateDoubleWordToByte (SRC[m+31:m])
            ELSE
                IF *merging-masking* ; merging-masking
                    THEN *DEST[i+7:i] remains unchanged*
                    ELSE *zeroing-masking*
                            ; zeroing-masking
                        DEST[i+7:i] := 0
                FI
        FI;
    ENDFOR
    DEST[MAXVL-1:VL/4] := 0;

#### VPMOVDB instruction (EVEX encoded versions) when dest is memory ¶

    (KL, VL) = (4, 128), (8, 256), (16, 512)
    FOR j := 0 TO KL-1
        i := j * 8
        m := j * 32
        IF k1[j] OR *no writemask*
            THEN DEST[i+7:i] := TruncateDoubleWordToByte (SRC[m+31:m])
            ELSE *DEST[i+7:i] remains unchanged* ; merging-masking
        FI;
    ENDFOR

#### VPMOVSDB instruction (EVEX encoded versions) when dest is a register ¶

    (KL, VL) = (4, 128), (8, 256), (16, 512)
    FOR j := 0 TO KL-1
        i := j * 8
        m := j * 32
        IF k1[j] OR *no writemask*
            THEN DEST[i+7:i] := SaturateSignedDoubleWordToByte (SRC[m+31:m])
            ELSE
                IF *merging-masking* ; merging-masking
                    THEN *DEST[i+7:i] remains unchanged*
                    ELSE *zeroing-masking*
                            ; zeroing-masking
                        DEST[i+7:i] := 0
                FI
        FI;
    ENDFOR
    DEST[MAXVL-1:VL/4] := 0;

#### VPMOVSDB instruction (EVEX encoded versions) when dest is memory ¶

    (KL, VL) = (4, 128), (8, 256), (16, 512)
    FOR j := 0 TO KL-1
        i := j * 8
        m := j * 32
        IF k1[j] OR *no writemask*
            THEN DEST[i+7:i] := SaturateSignedDoubleWordToByte (SRC[m+31:m])
            ELSE *DEST[i+7:i] remains unchanged* ; merging-masking
        FI;
    ENDFOR

#### VPMOVUSDB instruction (EVEX encoded versions) when dest is a register ¶

        (KL, VL) = (4, 128), (8, 256), (16, 512)
        FOR j := 0 TO KL-1
            i := j * 8
            m := j * 32
            IF k1[j] OR *no writemask*
                THEN DEST[i+7:i] := SaturateUnsignedDoubleWordToByte (SRC[m+31:m])
                ELSE
                    IF *merging-masking* ; merging-masking
                        THEN *DEST[i+7:i] remains unchanged*
                        ELSE *zeroing-masking*
                                ; zeroing-masking
                            DEST[i+7:i] := 0
                    FI
            FI;
        ENDFOR
        DEST[MAXVL-1:VL/4] := 0;
    VPMOVUSDB instruction (EVEX encoded versions) when dest is memory
        (KL, VL) = (4, 128), (8, 256), (16, 512)
        FOR j := 0 TO KL-1
            i := j * 8
            m := j * 32
            IF k1[j] OR *no writemask*
                THEN DEST[i+7:i] := SaturateUnsignedDoubleWordToByte (SRC[m+31:m])
                ELSE *DEST[i+7:i] remains unchanged* ; merging-masking
            FI;
        ENDFOR

### Intel C/C++ Compiler Intrinsic Equivalents ¶

    VPMOVDB __m128i _mm512_cvtepi32_epi8( __m512i a);

    VPMOVDB __m128i _mm512_mask_cvtepi32_epi8(__m128i s, __mmask16 k, __m512i a);

    VPMOVDB __m128i _mm512_maskz_cvtepi32_epi8( __mmask16 k, __m512i a);

    VPMOVDB void _mm512_mask_cvtepi32_storeu_epi8(void * d, __mmask16 k, __m512i a);

    VPMOVSDB __m128i _mm512_cvtsepi32_epi8( __m512i a);

    VPMOVSDB __m128i _mm512_mask_cvtsepi32_epi8(__m128i s, __mmask16 k, __m512i a);

    VPMOVSDB __m128i _mm512_maskz_cvtsepi32_epi8( __mmask16 k, __m512i a);

    VPMOVSDB void _mm512_mask_cvtsepi32_storeu_epi8(void * d, __mmask16 k, __m512i a);

    VPMOVUSDB __m128i _mm512_cvtusepi32_epi8( __m512i a);

    VPMOVUSDB __m128i _mm512_mask_cvtusepi32_epi8(__m128i s, __mmask16 k, __m512i a);

    VPMOVUSDB __m128i _mm512_maskz_cvtusepi32_epi8( __mmask16 k, __m512i a);

    VPMOVUSDB void _mm512_mask_cvtusepi32_storeu_epi8(void * d, __mmask16 k, __m512i a);

    VPMOVUSDB __m128i _mm256_cvtusepi32_epi8(__m256i a);

    VPMOVUSDB __m128i _mm256_mask_cvtusepi32_epi8(__m128i a, __mmask8 k, __m256i b);

    VPMOVUSDB __m128i _mm256_maskz_cvtusepi32_epi8( __mmask8 k, __m256i b);

    VPMOVUSDB void _mm256_mask_cvtusepi32_storeu_epi8(void * , __mmask8 k, __m256i b);

    VPMOVUSDB __m128i _mm_cvtusepi32_epi8(__m128i a);

    VPMOVUSDB __m128i _mm_mask_cvtusepi32_epi8(__m128i a, __mmask8 k, __m128i b);

    VPMOVUSDB __m128i _mm_maskz_cvtusepi32_epi8( __mmask8 k, __m128i b);

    VPMOVUSDB void _mm_mask_cvtusepi32_storeu_epi8(void * , __mmask8 k, __m128i b);

    VPMOVSDB __m128i _mm256_cvtsepi32_epi8(__m256i a);

    VPMOVSDB __m128i _mm256_mask_cvtsepi32_epi8(__m128i a, __mmask8 k, __m256i b);

    VPMOVSDB __m128i _mm256_maskz_cvtsepi32_epi8( __mmask8 k, __m256i b);

    VPMOVSDB void _mm256_mask_cvtsepi32_storeu_epi8(void * , __mmask8 k, __m256i b);

    VPMOVSDB __m128i _mm_cvtsepi32_epi8(__m128i a);

    VPMOVSDB __m128i _mm_mask_cvtsepi32_epi8(__m128i a, __mmask8 k, __m128i b);

    VPMOVSDB __m128i _mm_maskz_cvtsepi32_epi8( __mmask8 k, __m128i b);

    VPMOVSDB void _mm_mask_cvtsepi32_storeu_epi8(void * , __mmask8 k, __m128i b);

    VPMOVDB __m128i _mm256_cvtepi32_epi8(__m256i a);

    VPMOVDB __m128i _mm256_mask_cvtepi32_epi8(__m128i a, __mmask8 k, __m256i b);

    VPMOVDB __m128i _mm256_maskz_cvtepi32_epi8( __mmask8 k, __m256i b);

    VPMOVDB void _mm256_mask_cvtepi32_storeu_epi8(void * , __mmask8 k, __m256i b);

    VPMOVDB __m128i _mm_cvtepi32_epi8(__m128i a);

    VPMOVDB __m128i _mm_mask_cvtepi32_epi8(__m128i a, __mmask8 k, __m128i b);

    VPMOVDB __m128i _mm_maskz_cvtepi32_epi8( __mmask8 k, __m128i b);

    VPMOVDB void _mm_mask_cvtepi32_storeu_epi8(void * , __mmask8 k, __m128i b);

### SIMD Floating-Point Exceptions ¶

None.

### Other Exceptions ¶

EVEX-encoded instruction, see Table 2-53, “Type E6 Class Exception Conditions.”

Additionally:

#UD | If EVEX.vvvv != 1111B.